7.3 Feature Description

7.3.1 Timeout Watchdog Timer

The TPS3435-Q1 offers high precision timeout watchdog timer monitoring. The device is available in multiple

pinout options A to C which support multiple features to meet ever expanding needs of various applications.

Make sure a correct pinout is selected to meet the application needs.

The timeout watchdog is active when the VDD voltage is higher than the VDDMIN, MR voltage is held higher

than 0.7 x VDD and watchdog is enabled. TPS3435-Q1 family offers various startup time delay options to make

sure enough time is available for the host to complete boot operation. Please refer Section 7.3.1.3 for additional

details.

The timeout watchdog timer monitors the WDI pin for falling edge in the time frame defined by tWD time period.

Refer Section 7.3.1.1 section to arrive at the relevant tWD value needed for application. The timer value is reset

when a valid falling edge is detected on WDI pin in the tWD time duration. When a valid WDI transition is not

detected in tWD time, the device asserts WDO output. The WDO is asserted for time tWDO . Refer Section 7.3.3

to arrive at the relevant tWDO value needed for application.

Figure 7-4 shows the basic operation for timeout watchdog timer operation. The TPS3435-Q1 watchdog

functionality supports multiple features. Details are available in following sub sections.

WDI

ttWDOt

Ignore

ttWDt

ttWDt

ttWDt

ttSDt

tP-WD

WDO

tWD

Figure 7-4. Timeout Watchdog Timer Operation

7.3.1.1 tWD Timer

The tWD timer for TPS3435-Q1 can be set using an external capacitor connected between CWD pin and GND

pin. This feature is available with pinout options A or B. Applications which are space constrained or need timer

values which meet offered timer options, can benefit when using pinout options C. The TPS3435-Q1 offers

multiple fixed timer options ranging from 1ms up-to 100s.

The TPS3435-Q1, when using capacitance based timer, senses the capacitance value during the power up. The

capacitor is charged and discharged with known internal current source for one cycle to sense the capacitance

value. The sensed value is used to arrive at tWD timer for the watchdog operation. This unique implementation

helps reduce the continuous charge and discharge current for the capacitor, thus reducing overall current

consumption. Continuous charge and discharge of capacitance creates wider dead time (no watchdog monitor

functionality) when capacitor is discharging. The dead time is higher for high value of capacitance. The unique

implementation of TPS3435-Q1 helps avoid the dead time as the capacitance is not continuously charging or

discharging under normal operation. Make sure CCWD is < 200 x CCRST for accurate calibration of capacitance.

Equation 1 highlights the relationship between tWD in second and CWD capacitance in farad. The tWD timer

is 20% accurate for the capacitor's typical value. Accuracy of the capacitance has additional impact on the

tWD time. Make sure the capacitance meets the recommended operating range. Capacitance outside the

recommended range can lead to incorrect operation of the device.

tWD (sec) = 4.95 x 106 x CCWD (F)

(1)

The TPS3435-Q1 also offers wide selection of high accuracy fixed timer options starting from 1ms to 100sec

including various industry standard values. The TPS3435-Q1 fixed time options are ±10% accurate for tWD ≥

TPS3435-Q1

SLVSGF0B – OCTOBER 2022 – REVISED MARCH 2025

www.ti.com

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