R7FA6T2AB3CFL datasheet(1/101 Pages) RENESAS

tên linh kiện	R7FA6T2AB3CFL

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RA6T2 Group

Renesas Microcontrollers

High-performance 240 MHz Arm Cortex-M33 core, up to 512 KB code flash memory with background operation, 16 KB

Data flash memory, and 64 KB SRAM with ECC. Integrated A/D converter with channel-dedicated sample-and-hold circuit

for simultaneous sampling and single-end/pseudo-differential input supportive amplifier. Integrated General PWM Timer with

200 MHz operation and high resolution. Integrated Secure Cryptographic Engine with cryptography accelerators and key

management support in concert with Arm TrustZone for integrated secure element functionality.

Features

R01DS0400EJ0150

Rev.1.50

Jul 2, 2025

■ Arm® Cortex®-M33 Core

● Armv8-M architecture with the main extension

● Maximum operating frequency: 240 MHz

● Arm Memory Protection Unit (Arm MPU)

– Protected Memory System Architecture (PMSAv8)

– Secure MPU (MPU_S): 8 regions

– Non-secure MPU (MPU_NS): 8 regions

● SysTick timer

– Embeds two SysTick timers: Secure and Non-secure instance

– Driven by LOCO or system clock

● CoreSight™ ETM-M33

■ Memory

● Up to 512-KB code flash memory

● 16-KB data flash memory (125,000 program/erase (P/E) cycles)

● 64-KB SRAM

■ Connectivity

● Serial Communications Interface (SCI) × 6

– Asynchronous interfaces

– 8-bit clock synchronous interface

– Smart card interface

– Simple IIC

– Simple SPI

– Simple LIN

– Manchester coding

● I2C bus interface (IIC) × 2

– Transfer at up to 3.2 Mbps (high speed mode)

● Serial Peripheral Interface (SPI) × 2

● CAN with Flexible Data-rate (CANFD)

■ Analog

● A/D Converter (ADC) × 2

– Up to 16-bit resolution

– Up to 6.25 Msps

– Channel-dedicated sample-and-hold circuit × 6

– Programmable Gain Amplifier (PGA) × 4

● High-Speed Analog Comparator (ACMPHS) × 4

● 12-bit D/A Converter (DAC12) × 4

● Temperature Sensor (TSN)

■ Timers

● General PWM Timer 32-bit (GPT32) with High Resolution × 4

– 156 ps resolution in 200 MHz

● General PWM Timer 32-bit (GPT32) × 6

● Low Power Asynchronous General Purpose Timer (AGT) × 2

■ Security and Encryption

● Secure Cryptographic Engine (SCE5)

– Symmetric algorithms: AES

– Hash-value generation: GHASH

– 128-bit unique ID

● Arm® TrustZone®

– Up to three regions for the code flash

– Up to two regions for the data flash

– Up to three regions for the SRAM

– Individual secure or non-secure security attribution for each

peripheral

● Device lifecycle management

■ System and Power Management

● Low power modes

● Event Link Controller (ELC)

● Data Transfer Controller (DTC)

● DMA Controller (DMAC) × 8

● Power-on reset

● Low Voltage Detection (LVD) with voltage settings

● Watchdog Timer (WDT)

● Independent Watchdog Timer (IWDT)

● Key Interrupt Function (KINT)

■ Data Processing Accelerator

● Trigonometric Function Unit (TFU)

● IIR Filter Accelerator (IIRFA)

■ Multiple Clock Sources

● Main clock oscillator (MOSC) (8 to 24 MHz)

● High-speed on-chip oscillator (HOCO) (16/18/20 MHz)

● Middle-speed on-chip oscillator (MOCO) (8 MHz)

● Low-speed on-chip oscillator (LOCO) (32.768 kHz)

● IWDT-dedicated on-chip oscillator (15 kHz)

● Clock trim function for HOCO/MOCO/LOCO

● PLL/PLL2

● Clock out support

■ General-Purpose I/O Ports

● 5-V tolerance, open drain, input pull-up, switchable driving ability

■ Operating Voltage

● VCC: 2.7 to 3.6 V

■ Operating Temperature and Packages

● Ta = -40℃ to +105℃

– 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch)

– 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch)

– 48-pin LQFP (7 mm × 7 mm, 0.5 mm pitch)

– 64-pin QFN (8 mm × 8 mm, 0.4 mm pitch)

– 48-pin QFN (7 mm × 7 mm, 0.5 mm pitch)

Datasheet

R01DS0400EJ0150 Rev.1.50

Jul 2, 2025

Page 1 of 101

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