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Table 2.44

A/D conversion characteristics (1) in high-speed A/D conversion mode (2 of 2)

Conditions: VCC = AVCC0 = VREFH0 = 4.5 to 5.5 V*5, VSS = AVSS0 = VREFL0 = 0 V

Reference voltage range applied to the VREFH0 and VREFL0.

Parameter

Min

Typ

Max

Unit

Test conditions

Analog input capacitance*2

—

9*3

High-precision channel

—

10*3

Normal-precision channel

Analog input resistance

—

1.3*3

kΩ

High-precision channel

—

5.0*3

kΩ

Normal-precision channel

Analog input voltage range

Ain

—

VREFH0

—

Resolution

—

Bit

—

Conversion time*1

(Operation at PCLKD = 64

MHz)

Permissible

signal

source

impedance

Max. =

0.3 kΩ

0.70

(0.211)*4

—

µs

High-precision channel

ADCSR.ADHSC = 0

ADSSTRn.SST[7:0] = 0x0D

ADACSR.ADSAC = 0

1.34

(0.852)*4

—

µs

Normal-precision channel

ADCSR.ADHSC = 0

ADSSTRn.SST[7:0] = 0x36

ADACSR.ADSAC = 0

Conversion time*1

(Operation at PCLKD = 48

MHz)

Permissible

signal

source

impedance

Max. =

0.3 kΩ

0.67

(0.219)*4

—

µs

High-precision channel

ADCSR.ADHSC = 0

ADSSTRn.SST[7:0] = 0x0A

ADACSR.ADSAC = 1

1.29

(0.844)*4

—

µs

Normal-precision channel

ADCSR.ADHSC = 0

ADSSTRn.SST[7:0] = 0x28

ADACSR.ADSAC = 1

Offset error

—

±1.0

±4.5

LSB

High-precision channel

±6.0

LSB

Other than specified

Full-scale error

—

±1.0

±4.5

LSB

High-precision channel

±6.0

LSB

Other than specified

Quantization error

—

±0.5

—

LSB

—

Absolute accuracy

—

±2.5

±5.0

LSB

High-precision channel

±8.0

LSB

Other than specified

DNL differential nonlinearity error

—

±1.0

—

LSB

—

INL integral nonlinearity error

—

±1.5

±3.0

LSB

—

Note:

The characteristics apply when no pin functions other than 12-bit A/D converter input are used. Absolute accuracy does not include

quantization errors. Offset error, full-scale error, DNL differential nonlinearity error, and INL integral nonlinearity error do not include

quantization errors.

Note 1. The conversion time is the sum of the sampling time and the comparison time. The number of sampling states is indicated for the

test conditions.

Note 2. Except for I/O input capacitance (Cin), see section 2.2.4. I/O VOH, VOL, and Other Characteristics.

Note 3. Reference data.

Note 4. ( ) lists sampling time.

Note 5. When VREFH0 < AVCC0, the MAX. values are as follows.

Absolute accuracy/Offset error/Full-scale error:

For voltage difference between AVCC0 and VREFH0, it should be added ±0.75 LSB/V to the Max spec.

INL integral non-linearity error:

For voltage difference between AVCC0 and VREFH0, it should be added ±0.2 LSB/V to the Max spec.

Table 2.45

A/D conversion characteristics (2) in high-speed A/D conversion mode (1 of 2)

Conditions: VCC = AVCC0 = VREFH0 = 2.7 to 5.5 V*5, VSS = AVSS0 = VREFL0 = 0 V

Reference voltage range applied to the VREFH0 and VREFL0.

Parameter

Min

Typ

Max

Unit

Test conditions

PCLKD (ADCLK) frequency

—

MHz

—

RA2L2 Datasheet

2. Electrical Characteristics

R01DS0445EJ0120 Rev.1.20

Jun 9, 2026

Page 74 of 108

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