RA2L2 datasheet(40/108 Pages) RENESAS

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tSNZ

IRQ

ICLK (to DTC, SRAM)*1 PCLK

ICLK (except DTC, SRAM)

Oscillator

Software Standby mode

Snooze mode

Note 1. When SNZCR.SNZDTCEN bit is set to 1, ICLK is supplied to DTC and SRAM.

Figure 2.11

Recovery timing from Software Standby mode to Snooze mode

2.3.5

NMI and IRQ Noise Filter

Table 2.27

NMI and IRQ noise filter

Parameter

Symbol

Min

Typ

Max

Unit

Test conditions

NMI pulse width

tNMIW

200

—

NMI

digital

filter

disabled

tPcyc × 2

≤ 200 ns

tPcyc × 2*1

—

tPcyc × 2

> 200 ns

200

—

NMI

digital

filter

enabled

tNMICK ×

3 ≤

200 ns

tNMICK × 3.5*2

—

tNMICK ×

3 >

200 ns

IRQ pulse width

tIRQW

200

—

IRQ

digital

filter

disabled

tPcyc × 2

≤ 200 ns

tPcyc × 2*1

—

tPcyc × 2

> 200 ns

200

—

IRQ

digital

filter

enabled

tIRQCK ×

3 ≤

200 ns

tIRQCK × 3.5*3

—

tIRQCK ×

3 >

200 ns

Note:

200 ns minimum in Software Standby mode.

Note:

If the clock source is being switched, it is necessary to add 4 clock cycles of the switched source.

Note 1. tPcyc indicates the PCLKB cycle.

Note 2. tNMICK indicates the cycle of the NMI digital filter sampling clock.

Note 3. tIRQCK indicates the cycle of the IRQi digital filter sampling clock (i = 0 to 7).

RA2L2 Datasheet

2. Electrical Characteristics

R01DS0445EJ0120 Rev.1.20

Jun 9, 2026

Page 40 of 108

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