EM78F651NAMSSLASHNAMJ datasheet(25/58 Pages) EMC

25 / 58 page

EM78F651N

8-Bit Microcontroller

Product Specification (V1.1) 10.20.2006

• 21

(This specification is subject to change without further notice)

Table 6 Usage of Port 6 Input Change Wake-up/Interrupt Function

Usage of Port 6 Input Status Change Wake-up/Interrupt

(I) Wake-up from Port 6 Input Status Change

(II) Port 6 Input Status Change Interrupt

(a) Before Sleep

1. Read I/O Port 6 (MOV R6,R6)

1. Disable WDT2 (use this very carefully)

2. Execute "ENI"

2. Read I/O Port 6 (MOV R6,R6)

3. Enable interrupt (Set IOCF.1)

3 a. Enable interrupt (Set IOCF.1), after wake-up

if “ENI” switch to interrupt vector (006H), if

“DISI” excute next instruction

4. IF Port 6 change (interrupt)

→ Interrupt vector

(006H)

3 b. Disable interrupt (Set IOCF.1), always

execute next instruction

4. Enable wake-up enable bit (Set RA.6)

5 a. Execute "SLEP" instruction

b. After Wake-up

1. IF "ENI"

→ Interrupt vector (006H)

2. IF "DISI"

→ Next instruction

6.5 Reset and Wake-up

6.5.1 Reset

A reset is initiated by one of the following events:

(1) Power-on reset

(2) /RESET pin input "low", or

(3) WDT time-out (if enabled)

The device is kept in a reset condition for a period of approx. 18ms3 (one oscillator

start-up timer period) after the reset is detected. And if the /Reset pin goes “low” or

WDT time-out is active, a reset is generated, in RC mode the reset time is 34 clocks,

High crystal mode reset time is 2ms and 32clocks. In low crystal mode, the reset

time is 500ms. Once a reset occurs, the following functions are performed. Refer to

Fig 6-7.

The oscillator is running, or will be started.

The Program Counter (R2) is set to all "0".

All I/O port pins are configured as input mode (high-impedance state).

The Watchdog timer and prescaler are cleared.

Note: Software disables WDT (watchdog timer) but hardware must be enabled before applying Port 6 Change

Wake-Up function. (Code Option Register and Bit 11 (ENWDTB-) set to “1”).

Note: Vdd = 5V, set up time period = 16.8ms ± 8%

Vdd = 3V, set up time period = 18ms ± 8%

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