M7020R datasheet(115/150 Pages) STMICROELECTRONICS

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M7020R

Table 47. Latency of SEARCH from Cycles C and D to SRAM Access Cycle, 272-bit, Up to 31

Devices

Table 48. Shift of SSF and SSV from SADR

MIXED SEARCHES

Tables Configured with Different Widths Using

an M7020R

The sample operation shown is for a single device

with CFG = 1001000. It contains three tables of

x68, x136, and x272 widths. The operation may be

generalized to a block of 8–31 devices using four

blocks; the timing and the pipeline operation is the

same as described previously for fixed searches

on a table of one-width-size.

Figure 85, page 116 shows three sequential

searches:

– a 68-bit search on the table configured as x68;

– a 136-bit search on a table configured as x136;

and

– a 272-bit search on the table configured as x272

bits that each results in a hit.

Note: The DQ[67:66] will be '00' in both of the Cy-

cles A and B of the x68-bit search (Search1).

DQ[67:66] is '01' in both of the Cycles A and B of

the x136-bit search (Search2). DQ[67:66] is '10' in

all of the Cycles A, B, C, and D of the x272-bit

search (Search 3). By having table designation

bits, the M7020R enables the creation of many ta-

bles in a bank of search engines of different

widths.

Figure 86, page 117 shows the sample table. Two

bits in each 68-bit entry will need to designated as

the Table Number Bits. One example choice can

be the '00' values for the table configured as x68,

'01' values for tables configured as x136, and '10'

values for tables configured as x272. For the

above explanation, it is further assumed that bits

[67:66] for each entry will be designed as these

Table Designation Bits.

# of devices

Max Table Size

Latency in CLK Cycles

1 (TLSZ = 00)

8K x 272-bit

2–8 (TLSZ = 01)

64K x 272-bit

9–31 (TLSZ = 10)

248K x 272-bit

HLAT

Number of CLK Cycles

000

001

010

011

100

101

110

111

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