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C8051F310 bảng dữ liệu(PDF) 121 Page - Silicon Laboratories

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C8051F310 bảng dữ liệu(HTML) 121 Page - Silicon Laboratories

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Rev. 1.7
121
C8051F310/1/2/3/4/5/6/7
12. Oscillators
C8051F31x devices include a programmable internal oscillator and an external oscillator drive circuit. The
internal oscillator can be enabled/disabled and calibrated using the OSCICN and OSCICL registers, as
shown in Figure 12.1. The system clock can be sourced by the external oscillator circuit, the internal oscil-
lator, or a scaled version of the internal oscillator. The internal oscillator's electrical specifications are given
in Table 12.1 on page 123.
Figure 12.1. Oscillator Diagram
12.1. Programmable Internal Oscillator
All C8051F31x devices include a programmable internal oscillator that defaults as the system clock after a
system reset. The internal oscillator period can be programmed via the OSCICL register as defined by
SFR Definition 12.1 OSCICL is factor calibrated to obtain a 24.5 MHz frequency.
Electrical specifications for the precision internal oscillator are given in Table 12.1 on page 123. Note that
the system clock may be derived from the programmed internal oscillator divided by 1, 2, 4, or 8, as
defined by the IFCN bits in register OSCICN. The divide value defaults to 8 following a reset.
OSC
Programmable
Internal Clock
Generator
Input
Circuit
EN
SYSCLK
n
OSCICL
OSCICN
XTAL1
XTAL2
Option 2
VDD
XTAL2
Option 1
10M
Ω
Option 3
XTAL2
Option 4
XTAL2
OSCXCN
CLKSEL



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