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C8051F310 bảng dữ liệu(PDF) 90 Page - Silicon Laboratories

tên linh kiện C8051F310
Giải thích chi tiết về linh kiện  8/16 kB ISP Flash MCU Family
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nhà sản xuất  SILABS [Silicon Laboratories]
Trang chủ  http://www.silabs.com
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C8051F310 bảng dữ liệu(HTML) 90 Page - Silicon Laboratories

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C8051F310/1/2/3/4/5/6/7
90
Rev. 1.7
8.2.7. Register Descriptions
Following are descriptions of SFRs related to the operation of the CIP-51 System Controller. Reserved bits
should not be set to logic 1. Future product versions may use these bits to implement new features in
which case the reset value of the bit will be logic 0, selecting the feature's default state. Detailed descrip-
tions of the remaining SFRs are included in the sections of the data sheet associated with their corre-
sponding system function.
SFR Definition 8.1. DPL: Data Pointer Low Byte
TMR2L
0xCC
Timer/Counter 2 Low
198
TMR2RLH
0xCB
Timer/Counter 2 Reload High
198
TMR2RLL
0xCA
Timer/Counter 2 Reload Low
198
TMR3CN
0x91
Timer/Counter 3Control
201
TMR3H
0x95
Timer/Counter 3 High
202
TMR3L
0x94
Timer/Counter 3Low
202
TMR3RLH
0x93
Timer/Counter 3 Reload High
202
TMR3RLL
0x92
Timer/Counter 3 Reload Low
202
VDM0CN
0xFF
VDD Monitor Control
107
XBR1
0xE2
Port I/O Crossbar Control 1
135
XBR0
0xE1
Port I/O Crossbar Control 0
134
0x84-0x86, 0x96-0x97,
0xAB-0xAF, 0xB4, 0xB9,
0xBF, 0xC7, 0xC9, 0xCE,
0xCF, 0xD2, 0xD3, 0xD7,
0xDF, 0xE3, 0xE5, 0xF5
Reserved
Table 8.3. Special Function Registers (Continued)
Register
Address
Description
Page
Bits7–0: DPL: Data Pointer Low.
The DPL register is the low byte of the 16-bit DPTR. DPTR is used to access indirectly
addressed Flash memory.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0x82



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