actual device timing to vary such that the minimum of tWD can decrease and the maximum of tWD can increase

by the capacitor tolerance. For the most accurate timing, use ceramic capacitors with COG dielectric material.

8.2 Typical Applications

8.2.1 Design 1: Monitoring a Standard Microcontroller for Timeouts

This example application uses the TPS3435CDDBBDDFR to monitor a microcontroller to make sure it is not

stalled during operation.

VDD

GND

TPS3435

3.3V

Microcontroller

SET1

VCC

WD-EN

GND

MR

SET0

WDI

GPIO

Copyright © 2022, Texas Instruments Incorporated

RESET

WDO

Figure 8-1. Microcontroller Watchdog Monitoring Circuit

8.2.1.1 Design Requirements

PARAMETER

DESIGN REQUIREMENT

DESIGN RESULT

Watchdog Timeout Period

Typical timeout period of 40ms

Typical timeout period of 40ms

Watchdog Output Assert Delay

Typical output assert of 2ms

Typical output assert of 2ms

Startup Delay

Minimum startup delay of 700ms

Minimum startup delay of 900ms

Output logic voltage

Open-drain

Open-drain

Maximum device current

consumption

20µA

250nA typical, 3.0μA maximum(1)

(1)

Only includes the current consumption of the TPS3435.

8.2.1.2 Detailed Design Procedure

8.2.1.2.1 Setting the Watchdog Timeout Period

The watchdog timeout design requirement can be met either by using a fixed-timeout version of the TPS3435 or

by connecting a capacitor between the CWD pin and GND. The typical values can be met with preprogrammed

fixed time options, hence a pinout offering fixed time options is selected. Please see the Section 6.7 for a list

of fixed timeouts. If using the CWD feature, please refer to Section 7.3.1.1 for instructions on how to program

the timout period. In this application example, the 40ms timeout watchdog period is achieved by using watchdog

time of 10ms (option D) and watchdog time scaling of 4 (option B). Connect SET[1:0] = 0b'10 to select watchdog

time scaling of 4.

8.2.1.2.2 Setting Output Assert Delay

Please see the Section 6.8 for a list of fixed timeouts. Timeout option B was chosen to meet the design

requirement for a 2ms typical timeout.

8.2.1.2.3 Setting the Startup Delay

Startup delay option D is chosen, which offers a startup delay of 1s. This accounts for the minimum specification

of 700ms.

TPS3435

SNVSCF7A – DECEMBER 2022 – REVISED AUGUST 2024

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