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TMP112 bảng dữ liệu(PDF) 9 Page - Texas Instruments

tên linh kiện TMP112
Giải thích chi tiết về linh kiện  TMP112-Q1 and TMP112D-Q1 Automotive Grade High-Accuracy, Low-Power, Digital Temperature Sensor in SOT563 and X2SON Packages
PDF  46 Pages
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Trang chủ  https://www.ti.com
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TMP112 bảng dữ liệu(HTML) 9 Page - Texas Instruments

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6.7 Timing Requirements
See the Two-Wire Timing Diagram for more information.
FAST MODE
FAST MODE PLUS
HIGH-SPEED MODE
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
f(SCL)
SCL operating frequency
0.001
0.4
0.001
1
0.001
2.85 MHz
t(BUF)
Bus-free time between
STOP and START
conditions
600
–
500
160
–
ns
t(HDSTA)
Hold time after repeated
START condition.
After this period, the first
clock is generated.
600
–
260
160
–
ns
t(SUSTA)
Repeated START condition
setup time
600
–
260
160
–
ns
t(SUSTO) STOP condition setup time
600
–
260
160
–
ns
t(HDDAT) Data hold time
TMP112-Q1
100
900
12
150
25
105
ns
TMP112D-Q1
0
900
0
150
0
105
ns
t(SUDAT) Data setup time
100
–
50
25
–
ns
t(LOW)
SCL clock low period
V+
1300
–
500
210
–
ns
t(HIGH)
SCL clock high period
600
–
260
60
–
ns
tFD
Data fall time
–
300
-
120
–
80
ns
tRD
Data rise time
–
300
–
120
–
–
ns
SCLK ≤ 100kHz
–
1000
–
-
–
–
ns
tFC
Clock fall time
–
300
–
120
–
40
ns
tRC
Clock rise time
–
300
–
120
–
40
ns
6.8 Timing Diagrams
SCL
SDA
t
(LOW)
t
RC
t
FC
t
(HDSTA)
t
(HDSTA)
t
(HDDAT)
t
(SUDAT)
t
(HIGH)
t
(SUSTA)
t
(SUSTO)
t
(BUF)
S
S
P
P
t
RD
t
FD
Figure 6-1. Two-Wire Timing Diagram
www.ti.com
TMP112-Q1, TMP112D-Q1
SLOS887G – SEPTEMBER 2014 – REVISED MAY 2025
Copyright © 2025 Texas Instruments Incorporated
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Product Folder Links: TMP112-Q1 TMP112D-Q1



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