LMK05028RGCT datasheet(29/94 Pages) TI2

tên linh kiện	LMK05028RGCT

Giải thích chi tiết về linh kiện	LMK05028 Low-Jitter Dual-Channel Network Synchronizer Clock With EEPROM

PDF	94 Pages

Scroll/Zoom	100%

nhà sản xuất	TI2 [Texas Instruments]

Trang chủ	https://www.ti.com

Logo

29 / 94 page

performance, provided the TCXO loop bandwidth is designed low enough to attenuate the noise contribution.

This input can be driven from a low-frequency TCXO, OCXO, or external traceable clock that conforms to the

frequency accuracy and holdover stability requirements of the application. TCXO and OCXO frequencies of 10 to

12.8 MHz are widely available and cost-effective options.

The TCXO input can accept an AC-coupled single-ended clock (sine, clipped-sine, or square wave) and has an

internal weak bias of about 0.6 V. The input voltage swing must be less than 1.3 Vpp and terminated before

AC-coupling to the pin. If unused, the TCXO input buffer can be powered down by register bit and the pin can be

left floating.

The buffered TCXO path also drives the input monitoring blocks as well as the TCXO/Ref bypass mux to the

output muxes, allowing a buffered copy of the TCXO input on OUT0 and/or OUT1.

LMK05028

TCXO_IN

11 k

~0.6 V

(weak bias)

Internal

TCXO path

1.2-V

LVCMOS

Figure 7-9. TCXO Input Buffer

www.ti.com

LMK05028

SNAS724B – FEBRUARY 2018 – REVISED FEBRUARY 2025

Submit Document Feedback

Product Folder Links: LMK05028

LMK05028RGCT bảng dữ liệu(PDF) 29 Page - Texas Instruments