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DP83867CS bảng dữ liệu(PDF) 99 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  DP83867E/IS/CS Robust, High Immunity, Small Form Factor 10/100/1000 Ethernet Physical Layer Transceiver
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Table 7-124. TDR Peak Locations Register 8 (TDR_PEAKS_LOC_8), Address 0x0197 (continued)
BIT
BIT NAME
DEFAULT
DESCRIPTION
7:0
TDR_PEAKS_LOC_C_4
0, RO
Location of the fifth peak discovered by the TDR mechanism on
channel C. The value of these bits is translated into distance from
the PHY.
7.6.115 TDR Peak Locations Register 9 (TDR_PEAKS_LOC_9)
Table 7-125. TDR Peak Locations Register 9 (TDR_PEAKS_LOC_9), Address 0x0198
BIT
BIT NAME
DEFAULT
DESCRIPTION
15:8
TDR_PEAKS_LOC_D_2
0, RO
Location of the third peak discovered by the TDR mechanism on
channel D. The value of these bits is translated into distance from
the PHY.
7:0
TDR_PEAKS_LOC_D_1
0, RO
Location of the second peak discovered by the TDR mechanism on
channel D. The value of these bits is translated into distance from
the PHY.
7.6.116 TDR Peak Locations Register 10 (TDR_PEAKS_LOC_10)
Table 7-126. TDR Peak Locations Register 10 (TDR_PEAKS_LOC_10), Address 0x0199
BIT
BIT NAME
DEFAULT
DESCRIPTION
15:8
TDR_PEAKS_LOC_D_4
0, RO
Location of the fifth peak discovered by the TDR mechanism on
channel D. The value of these bits is translated into distance from
the PHY.
7:0
TDR_PEAKS_LOC_D_3
0, RO
Location of the fourth peak discovered by the TDR mechanism on
channel D. The value of these bits is translated into distance from
the PHY.
7.6.117 TDR Peak Amplitudes Register 1 (TDR_PEAKS_AMP_1)
Table 7-127. TDR Peak Amplitudes Register 1 (TDR_PEAKS_AMP_1), Address 0x019A
BIT
BIT NAME
DEFAULT
DESCRIPTION
15
RESERVED
0, RO
RESERVED
14:8
TDR_PEAKS_AMP_A_1
0, RO
Amplitude of the second peak discovered by the TDR mechanism on
channel A. The value of these bits is translated into type of cable
fault and-or interference.
7
RESERVED
0, RO
RESERVED
6:0
TDR_PEAKS_AMP_A_0
0, RO
Amplitude of the first peak discovered by the TDR mechanism on
channel A. The value of these bits is translated into type of cable
fault and-or interference.
7.6.118 TDR Peak Amplitudes Register 2 (TDR_PEAKS_AMP_2)
Table 7-128. TDR Peak Amplitudes Register 2 (TDR_PEAKS_AMP_2), Address 0x019B
BIT
BIT NAME
DEFAULT
DESCRIPTION
15
RESERVED
0, RO
RESERVED
14:8
TDR_PEAKS_AMP_A_3
0, RO
Amplitude of the fourth peak discovered by the TDR mechanism on
channel A. The value of these bits is translated into type of cable
fault and-or interference.
7
RESERVED
0, RO
RESERVED
6:0
TDR_PEAKS_AMP_A_2
0, RO
Amplitude of the third peak discovered by the TDR mechanism on
channel A. The value of these bits is translated into type of cable
fault and-or interference.
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DP83867CS, DP83867IS, DP83867E
SNLS504F – OCTOBER 2015 – REVISED JANUARY 2025
Copyright © 2025 Texas Instruments Incorporated
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Product Folder Links: DP83867CS DP83867IS DP83867E



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