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ISO7710FDWR bảng dữ liệu(PDF) 22 Page - Texas Instruments

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ISO7710FDWR bảng dữ liệu(HTML) 22 Page - Texas Instruments

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8.2.1 Design Requirements
To design with this device, use the parameters listed in Table 8-1.
Table 8-1. Design Parameters
PARAMETER
VALUE
Supply voltage, VCC1 and VCC2
2.25 V to 5.5 V
Decoupling capacitor between VCC1 and GND1
0.1 µF
Decoupling capacitor from VCC2 and GND2
0.1 µF
8.2.2 Detailed Design Procedure
Unlike optocouplers, which require components to improve performance, provide bias, or limit current, the
ISO7710 device only requires two external bypass capacitors to operate.
0.1 …F
2 mm
maximum
from V
CC1
0.1 …F
2 mm
maximum
from V
CC2
V
CC1
V
CC2
GND1
GND2
1
2
3
4
8
7
6
5
OUT
IN
INPUT
OUTPUT
Figure 8-2. Typical ISO7710 Circuit Hook-up
8.2.3 Application Curve
The following typical eye diagram of the ISO7710 device indicates low jitter and wide open eye at the maximum
data rate of 100 Mbps.
Time = 3.5 ns / div
Figure 8-3. ISO7710 Eye Diagram at 100 Mbps PRBS, 5-V Supplies and 25°C
ISO7710
SLLSER9E – NOVEMBER 2016 – REVISED DECEMBER 2024
www.ti.com
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Product Folder Links: ISO7710



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