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ISO7710FDWR bảng dữ liệu(PDF) 15 Page - Texas Instruments

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ISO7710FDWR bảng dữ liệu(HTML) 15 Page - Texas Instruments

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5.17 Switching Characteristics—2.5-V Supply
VCC1 = VCC2 = 2.5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPLH, tPHL
Propagation delay time
See Figure 6-1
7.5
12
21
ns
PWD
Pulse width distortion(1) |tPHL – tPLH|
0.2
5.9
ns
tsk(pp)
Part-to-part skew time(2)
4.6
ns
tr
Output signal rise time
See Figure 6-1
1
3.5
ns
tf
Output signal fall time
1
3.5
ns
tDO
Default output delay time from input
power loss
Measured from the time VCC1 goes
below 1.7V. See Figure 6-2
0.1
0.3
μs
tie
Time interval error
216 – 1 PRBS data at 100 Mbps
1
ns
(1)
Also known as pulse skew.
(2)
tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same
direction while operating at identical supply voltages, temperature, input signals and loads.
5.18 Insulation Characteristics Curves
Ambient Temperature (qC)
0
50
100
150
200
0
100
200
300
400
500
600
D001
VCC1 = VCC2 = 2.75 V
VCC1 = VCC2 = 3.6 V
VCC1 = VCC2 = 5.5 V
Figure 5-1. Thermal Derating Curve for Limiting
Current per VDE for DW-16 Package
Ambient Temperature (qC)
0
50
100
150
200
0
200
400
600
800
1000
1200
1400
D002
Figure 5-2. Thermal Derating Curve for Limiting
Power per VDE for DW-16 Package
Ambient Temperature (qC)
0
20
40
60
80
100
120
140
160
0
50
100
150
200
250
300
350
D003
VCC1 = VCC2 = 2.75 V
VCC1 = VCC2 = 3.6 V
VCC1 = VCC2 = 5.5 V
Figure 5-3. Thermal Derating Curve for Limiting
Current per VDE for D-8 Package
Ambient Temperature (qC)
0
50
100
150
200
0
100
200
300
400
500
600
700
800
900
D004
Figure 5-4. Thermal Derating Curve for Limiting
Power per VDE for D-8 Package
www.ti.com
ISO7710
SLLSER9E – NOVEMBER 2016 – REVISED DECEMBER 2024
Copyright © 2024 Texas Instruments Incorporated
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