STPM098C datasheet(85/110 Pages) STMICROELECTRONICS

85 / 110 page

Figure 71. T_on time with MULTI_PULSE_STRAT = 0x02

MIN

TOFF

DVCO Pulse

PWM

Behavior during TON generation

Additional DVCO pulses

skipped during TON

Behavior during TOFF generation

New TON generated after

minimum TOFF

MULTI_PULSE_STRAT= 0x03

Pulse merger skips DCO pulses received during the nominal ON time itself as well as DCO pulses received

during the minimum TOFF window.

Figure 72. T_on time with MULTI_PULSE_STRAT = 0x03

MIN

TOFF

DVCO Pulse

PWM

Behavior during TON generation

Additional DVCO pulses

skipped during TON

Behavior during TOFF generation

Additional DVCO pulses

skipped during minimum TOFF

3.14.7

Efficiency enhancement

3.14.7.1

Dynamic phase shedding (DPS)

In order to maximize conversion efficiency over the whole load range, the STPM098C loop controller allows the

possibility to automatically adjust the number of active phases among the available subset defined by phase

assignment programming.

Active phases are added/dropped basing on the comparison between the converted load current level

measurement and a programmable threshold thus optimizing efficiency over the whole load range.

Σj=1mISENj−CFILTVREF1 ≥PHASEn_ADD_THoccursforanintervallongerthanIOUTADCconversionlatency,the

n-th phase contribution is added to the control loop (n-th PWM enabled, ISENn monitor enabled).

Σj=1mISENj−CFILTVREF1 ≤PHASEn_DROP_THoccursforanintervallongerthanIOUTADCconversionlatency

plus the configured DROP_DELAY, the n-th phase contribution is dropped from the control loop (n-th PWM

disabled (HIZ), ISENn monitor disabled).

The DPS add/drop thresholds can be programmed through a dedicated PMBus™ register as follows:

PHASE2ADDTH=ΔLSB×MFRPHASE2ADDCFG7:0

(51)

PHASE2DROPTH=ΔLSB×MFRPHASE2DROPCFG7:0

(52)

PHASE3ADDTH=ΔLSB×MFRPHASE3ADDCFG7:0

(53)

PHASE3DROPTH=ΔLSB×MFRPHASE3DROPCFG7:0

(54)

PHASE4ADDTH=ΔLSB×MFRPHASE4ADDCFG7:0

(55)

PHASE4DROPTH=ΔLSB×MFRPHASE4DROPCFG7:0

(56)

STPM098C

Functional description

DS14440 - Rev 1

page 85/110

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