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SPSB100 bảng dữ liệu(PDF) 43 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  Automotive power management IC for highly integrated processors
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Figure 26. NFSO1 output pin behavior at battery plug
Figure 27. NFSO1 output pin behavior after a failure is detected
3.14
Interrupt - IRQ
IRQ pin is an open-drain with an internal pull-up for the echo-generation. An external pull-up to VIO level close to
MCU is strongly recommended. IRQ pin is set low if any of the following events is happening, as showed in the
table below.
Table 8. IRQ events
SPI status bit name
IRQ generated
IRQ SPI mask name
ABIST_COMPLETE
Y
Not maskable
LBIST_COMPLETE
Y
Not maskable
BOOST_IN_LP
Y
MASK_BOOST_IN_LP_IRQ
BOOST_VDSMON_ERROR
Y
MASK_BOOST_VDSMON_IRQ
BUCK1_OC
Y if BUCK1_REGFAIL_GO_REC = 0
MASK_BUCK1_OC_IRQ
BUCK1_OV
Y if BUCK1_REGFAIL_GO_REC = 0
MASK_BUCK1_IRQ
BUCK1_FB
Y if BUCK1_REGFAIL_GO_REC = 0
MASK_BUCK1_IRQ
SPSB100
Functional description
DS14640 - Rev 2
page 43/213



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