L99PM72PXP datasheet(58/128 Pages) STMICROELECTRONICS

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Electrical specifications

L99PM72PXP

58/128

Doc ID 023553 Rev 3

5.5.6

Reset output

The voltages are referred to GND and currents are assumed positive, when the current

flows into the pin. 4.0 V < VS < 28 V; Tj = -40°C to 130°C, unless otherwise specified.

5.5.7

Watchdog

4.5 V < VS <28V; 4.8V<V1 < 5.2 V; Tj = -40°C to 130°C, unless otherwise specified,

see Figure 31 and Figure 32.

tV2fail

V2 fail filter time

µs

tV2short

V2 short filter time

Nominal capacitor value required for stability of the regulator. Tested with 220 nF ceramic (+/- 20%).

Capacitor must be located close to the regulator output pin

Table 18.

Voltage regulator V2 (continued)

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

Table 19.

Reset output

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

VRT1

Reset threshold voltage 1

VV1 decreasing

3.7

3.9

4.1

VRT2

Reset threshold voltage 2

VV1 decreasing

4.2

4.3

4.45

VRT3

Reset threshold voltage 3

VV1 decreasing

4.25

4.4

4.55

VRT4

Reset threshold voltage 4

VV1 decreasing

4.5

4.60

4.75

VV1 increasing

4.7

4.8

4.9

VRESET

Reset pin low output

voltage

V1 >1V; IRESET =5mA

0.2

0.4

RRESET Reset pull up int. resistor

110

150



tRR

Reset reaction time

ILOAD =1mA

s

tUV1

V1 undervoltage filter time

s

Trd

Reset pulse duration

1.46

2.0

2.5

Table 20.

Watchdog

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

tLW

Long open window

48.75

81.25

TEFW1

Early failure window 1

4.5

TLFW1

Late failure window 1

TSW1

Safe window 1

7.5

TEFW2

Early failure window 2

22.3

TLFW2

Late failure window 2

100

TSW2

Safe window 2

37.5

TEFW3

Early failure window 3

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