L9300 datasheet(126/178 Pages) STMICROELECTRONICS

tên linh kiện	L9300

Giải thích chi tiết về linh kiện	Automotive flexible U-chip for braking and transmission

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16.3.4

Q&A watchdog registers

Table 60. Q&A watchdog registers address mapping

Q&A Seed/Answer

WDG2SEEDANS

Q&A Status

WDG2STATUS

Q&A Answer Timing

WDG2ANSTMG

Q&A Request Timing

WDG2RQTMG

Q&A Configuration

WDG2PGM

Q&A Write Unlock

WDG2UNLOCK

WDG2SEEDANS

Q&A Seed/Answer

Address:

GLOBAL_BaseAddress + 0xE

Type:

Reset:

0b0000 0000 0000 0000 0000 0000

Description:

It contains seed value sent to the micro to be used for Answer elaboration in read mode.

It contains Answer word in write mode

[19:16] unused

If Bit 31 = 0 ==> Read operation

[15:8] unused

[7:0] Seed: Current value of the seed sent to the microcontroller to be used for the Answer elaboration

Reset events: VB_UV, GND_LOSS, POR

If Bit 31 = 1 ==> Write operation

[15:8] Answer HIGH: Higher part of the answer obtained as described on Section 14: Q&A Watchdog

Reset events: VB_UV, GND_LOSS, POR

[7:0] Answer LOW: Lower part of the answer obtained as described on Section 14: Q&A Watchdog

Reset events: VB_UV, GND_LOSS, POR

L9300

SPI interface and register mapping

DS12258 - Rev 5

page 126/178

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