L9300 datasheet(29/178 Pages) STMICROELECTRONICS

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Symbol

Parameter

Test condition

Min

Typ

Max

Unit

VDD4_G out

Gate output voltage

VBATP = 5.5 V, Open loop condition,

VDD4_SEL = 0.7 V

VDD4_G

VDD4_G pd

Gate internal pull down

100

1000

kΩ

VDD4_G

VDD4_PSSR

PSSR

VDRAIN = 6.5 V, IVDD3 = 500 mA,

Vnoise = 1 Vpp, fnoise = 465 kHz,

CVDD4 = 5 µF Guaranteed by design

VDD4

VDD4_SEL

ovs_a

Overshoot at power on

IVDD4 = 10 mA, CVDD4 = 5 µF

+4%

VDD4_SEL

ovs_b

Overshoot at VBATP step

VBATP step from 5.5 V to 13 V

during 10 µs, IVDD4 = 500 mA,

CVDD4 = 5 µF, Guaranteed by design

+10%

VDD4_SEL

VDD4_SEL soft

Slope control

VDRAIN=VBATP = 13 V IVDD4 =

10 mA, CVDD4 = 4.7 µF

V/ms VDD4_SEL

Diagnostic

VDD4_UV

VDD4_SEL undervoltage

VDD4_SEL

typ * (9.1/10)

VDD4_SEL

typ * (9.6/10)

VDD4_SEL

VDD4_UV_ft

VDD4_SEL undervoltage

filter time

Guaranteed by scan

µs

VDD4_SEL

VDD4_OV

VDD4_SEL overvoltage

VDD4_SEL

typ * (11/10)

VDD4_SEL

typ * (11.8/10)

VDD4_SEL

VDD4_OV_ft

VDD4_SEL overvoltage

filter time

Guaranteed by scan

µs

VDD4_SEL

1. If VDRAIN is supplied by VDD1, the value of the optional filtering capacitor must be chosen taking into account VDD1 current limitation

value vs in-rush current during regulator power-up and supply transients.

8.4.3

VDD4 error handling

Table 13. VDD4 type errors

Type of error

Detection

condition

Action

Clear SPI flag

Restart condition

VDD4 under voltage

ON state

RES1 driven low. VDD4 UNDER VOLTAGE SPI flag

(7) latched in SERVFLT register

On read

Automatic after fault

disappears

VDD4 over voltage

ON state

RES1 driven low. VDD4 OVER VOLTAGE SPI flag (9)

latched in SERVFLT register

On read

Automatic after fault

disappears

8.5

TRK 1, 2, 3, 4

TRK1, TRK2, TRK3, TRK4 are four tracking regulators that can be configured to work also as wheel speed

interface depending on the voltage applied on TRK_SEL pin. All four regulators act as wheel speed interface in

case the TRL_SEL pin is grounded, otherwise each regulator tracks independently the voltage provided at

TRK_SEL pin (3.3 ≤ TRK_SEL ≤ 5) with a matching error of ± 20 mV. Since TRK outputs can be used to track

VDD3 or VDD4 voltages, their configuration is masked and they are kept disabled until both VDDx voltages are

above their undervoltage threshold to avoid wrong configuration detection during power-up. Once triggered the

configuration is latched and the echo of the configuration is provided in SPI registers.

8.5.1

Tracking regulator configuration

Functional description

Connecting TRK_SEL to either VDD3 or VDD4 output voltage or an external voltage reference the TRKn outputs

are configured as tracking regulators and start providing an output voltage in track with the desired reference. The

four TRKn outputs are however able to track only voltages starting from 3.3V.

L9300

Power supply

DS12258 - Rev 5

page 29/178

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