L9680 datasheet(51/286 Pages) STMICROELECTRONICS

51 / 286 page

DS11615 Rev 7

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L9680

Start-up and power control

285

6.11

VSF regulator and control

The L9680 provides a low current linear regulator that can be used in the system design to

bias the external high-side safing switch. The regulator output is 20 V nominal (configurable

to 25 V via SPI command). VSF is enabled if any of the ARMxINT signal is asserted, as

shown in Figure 25. The VSF regulator supply input is ERBOOST.

Figure 25. VSF control logic

VSF voltage can be monitored by the user through the internal ADC. Characteristics for this

function are shown in the electrical performance tables.

6.12

Oscillators

The device integrates two trimmed oscillators, both of them with spread spectrum capability

selectable via the CLK_CNF register.

The main oscillator runs at 16 MHz typ and is used to provide clock to the internal

synchronous logic. Moreover, this frequency is divided down by factor 8.5 to generate

clocks for the switching regulators (1.882 MHz typ).

The auxiliary oscillator runs at 7.5 MHz typ and is used to monitor the main oscillator. In

case the main oscillator frequency was lower than fOSC_LOW_TH threshold or higher than

fOSC_HIGH_TH threshold, the condition is detected by the frequency monitor circuit and then

latched into the CLKFRERR flag in the FLTSR register and a POR is issued.

If the clock error is temporary, it is possible to read the fault flag once out of POR.

6.13

Reset control

The device provides reset logic to safely control system operation in the event of internal

ECU failures. Several internal reset signals are generated depending on the type of failure

detected. In Figure 26 the voltage monitoring diagram is shown.

GAPGPS02268

VSF_EN

ARM1INT

ARM2INT

ARM3INT

ARM4INT

SAFING STATE

SAFESEL

ARMING STATE

DIAG STATE

DSTEST(VSF)

ARM_EN

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