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DAC80504 bảng dữ liệu(PDF) 36 Page - Texas Instruments |
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DAC80504 bảng dữ liệu(HTML) 36 Page - Texas Instruments |
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36 / 50 page ![]() Microcontroller CS SCLK MOSI CS SCLK SDI DACx0504 MISO SDO Copyright © 2017, Texas Instruments Incorporated 36 DAC80504, DAC70504, DAC60504 SBAS871C – AUGUST 2017 – REVISED JANUARY 2019 www.ti.com Product Folder Links: DAC80504 DAC70504 DAC60504 Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The high linearity, small package size and wide temperature range make the DACx0504 suitable in applications such as optical networking, wireless infrastructure, industrial automation and data acquisition systems. The device incorporates a 2.5 V internal reference with an internal reference divider circuit that enables full-scale DAC output voltages of 1.25 V, 2.5 V, or 5 V. 9.1.1 Interfacing to a Microcontroller Figure 74 displays a typical serial interface that may be observed when connecting the DACx0504 SPI serial interface to a (master) microcontroller type platform. The setup for the interface is as follows: the microcontroller output SPI CLK drives the SCLK pin of the DACx0504, while the DACx0504 SDI pin is driven by the MOSI pin of the microcontroller. The CS pin of the DACx0504 can be asserted from a general program input/output pin of the microcontroller. When data are to be transmitted to the DACx0504, the CS pin is taken low. The data from the microcontroller is then transmitted to the DACx0504, totaling 24 bits latched into the DACx0504 device through the falling edge of SCLK. CS is then brought high after the completed write. The DACx0504 requires data with the MSB as the first bit received. Figure 74. Typical Serial Interface |
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