DAC80504 datasheet(24/50 Pages) TI2

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No Power-On Reset

Power-On Reset

1.20

Undefined

0.00

2.20

2.70

5.50

VDD (V)

Specified Supply

Voltage Range

No Power-On Reset

Power-On Reset

1.50

Undefined

0.00

0.70

1.70

5.50

VIO (V)

Specified Supply

Voltage Range

DAC80504, DAC70504, DAC60504

SBAS871C – AUGUST 2017 – REVISED JANUARY 2019

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Product Folder Links: DAC80504 DAC70504 DAC60504

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8.3.3 Device Reset Options

8.3.3.1 Power-on-Reset (POR)

The DACx0504 includes a power-on reset function that controls the output voltage at power up. After the VDD

and VIO supplies have been established a POR event is issued. The POR causes all registers to initialize to their

default values and communication with the device is valid only after a 250 µs power-on-reset delay. The default

value for all DACs is either zero-code or midscale-code as determined by the RSTSEL pin. Each DAC channel

remains at the power-up voltage until a valid command is written to it.

The POR circuit requires specific supply levels to discharge the internal capacitors and to reset the device on

power up, as indicated in Figure 59 and Figure 60. In order to initiate a POR event, VDD or VIO must be below

their corresponding low thresholds for at least 100 µs. If VDD and VIO remain above their specified high threshold

a POR event will not occur. When the supplies drop below their high threshold but remain over the lower one

(shown as the undefined region), the device may or may not reset under all specified temperature and power-

supply conditions.

Figure 59. Threshold Levels for VDD POR Circuit

Figure 60. Threshold Levels for VIO POR Circuit

8.3.3.2 Software Reset

A device software reset event is initiated by writing the reserved code 0x1010 to SOFT-RESET in the TRIGGER

initiates a POR event.

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