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STM32G030F6 bảng dữ liệu(PDF) 56 Page - STMicroelectronics |
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STM32G030F6 bảng dữ liệu(HTML) 56 Page - STMicroelectronics |
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56 / 94 page ![]() Electrical characteristics STM32G030x6/x8 56/94 DS12991 Rev 1 5.3.10 Flash memory characteristics Jitter RMS cycle-to-cycle jitter System clock 56 MHz -50 - ±ps RMS period jitter - 40 - IDD(PLL) PLL power consumption on VDD(1) VCO freq = 96 MHz - 200 260 μA VCO freq = 192 MHz - 300 380 VCO freq = 344 MHz - 520 650 1. Guaranteed by design. 2. Take care of using the appropriate division factor M to obtain the specified PLL input clock values. The M factor is shared between the two PLLs. Table 40. PLL characteristics(1) (continued) Symbol Parameter Conditions Min Typ Max Unit Table 41. Flash memory characteristics(1) 1. Guaranteed by design. Symbol Parameter Conditions Typ Max Unit tprog 64-bit programming time - 85 125 µs tprog_row Row (32 double word) programming time Normal programming 2.7 4.6 ms Fast programming 1.7 2.8 tprog_page Page (2 Kbyte) programming time Normal programming 21.8 36.6 Fast programming 13.7 22.4 tERASE Page (2 Kbyte) erase time - 22.0 40.0 tprog_bank Bank (64 Kbyte(2)) programming time 2. Values provided also apply to devices with less Flash memory than one 64 Kbyte bank Normal programming 0.7 1.2 s Fast programming 0.4 0.7 tME Mass erase time - 22.1 40.1 ms IDD(FlashA) Average consumption from VDD Programming 3 - mA Page erase 3 - Mass erase 5 - IDD(FlashP) Maximum current (peak) Programming, 2 µs peak duration 7- mA Erase, 41 µs peak duration 7- Table 42. Flash memory endurance and data retention Symbol Parameter Conditions Min(1) 1. Guaranteed by characterization results. Unit NEND Endurance TA = -40 to +105 °C 1 kcycles tRET Data retention 1 kcycle(2) at TA = 85 °C 15 Years |
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