TAS3103ADBT datasheet(65/154 Pages) TI2

65 / 154 page

3−2

Gain coefficients, entered via the I2C bus, must be entered as 32-bit binary numbers. The format of the 32-bit number

(4-byte or 8-digit hexadecimal number) is shown in Figure 3−3.

Coefficient

Digit 8

Coefficient

Digit 7

Coefficient

Digit 6

Coefficient

Digit 5

Coefficient

Digit 4

Coefficient

Digit 3

Coefficient

Digit 2

Coefficient

Digit 1

Fraction

Digit 5

Sign

Bit

Fraction

Digit 6

Fraction

Digit 4

Fraction

Digit 3

Fraction

Digit 2

Fraction

Digit 1

Integer

Digit 1

u = unused or don’t care bits

Digit = hexadecimal digit

Figure 3−3. Alignment of 5.23 Coefficient in 32-Bit I2C Word

As Figure 3−3 shows, the hexadecimal value of the integer part of the gain coefficient cannot be concatenated with

the hexadecimal value of the fractional part of the gain coefficient to form the 32-bit I2C coefficient. The reason is that

the 28-bit coefficient contains 5 bits of integer, and thus the integer part of the coefficient occupies all of one

hexadecimal digit and the most-significant bit of the second hexadecimal digit. In the same way, the fractional part

occupies the lower 3 bits of the second hexadecimal digit, and then occupies the other five hexadecimal digits (with

the eighth digit being the zero-valued most-significant hexadecimal digit).

3.1.2

48-Bit 25.23 Number Format

All level adjustment and threshold coefficients are 48-bit coefficients using a 25.23 number format. Numbers

formatted as 25.23 numbers means that there are 25 bits to the left of the decimal point and 23 bits to the right of the

decimal point. This is shown in Figure 3−4.

2−23 Bit

S_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx.xxxx_xxxx_xxxx_xxxx_xxxx_xxx

20 Bit

216 Bit

222 Bit

Sign Bit

223 Bit

2−1 Bit

2−10 Bit

Figure 3−4. 25.23 Format

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