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ELECTRICAL CHARACTERISTICS

TAS5342L

SLAS558 – OCTOBER 2007

AUDIO SPECIFICATIONS (PBTL) (continued)

Audio performance is recorded as a chipset consisting of a TAS5518 pwm processor (modulation index limited to 97.7%) and

a TAS5342L power stage. PCB and system configuraton are in accordance with recommended guidelines. Audio frequency =

1kHz, PVDD_x = 32.0 V, GVDD_x = 12 V, RL = 3 Ω, fS = 384 kHz, ROC = 22 kΩ, TC = 75°C, Output Filter: LDEM = 10 μH, CDEM

= 1.0 uF, unless otherwise noted.

TAS5342L

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

PO = 0 W, all half bridges

Pidle

Power dissipation due to idle losses (IPVDD_X)

3

W

switching(2)

(2)

Actual system idle losses are affected by core losses of output inductors.

PVDD_x = 32.0 V, GVDD_X = 12 V, VDD = 12 V, TC (Case temperature) = 25°C, fS = 384 kHz, unless otherwise specified.

TAS5342L

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

Internal Voltage Regulator and Current Consumption

Voltage regulator, only used as a

VREG

VDD = 12 V

3

3.3

3.6

V

reference node

Operating, 50% duty cycle

7.1

17

IVDD

VDD supply current

mA

Idle, reset mode

5.6

11

50% duty cycle

5.9

12

IGVDD_X

Gate supply current per half-bridge

mA

Reset mode

1

1.8

50% duty cycle, without output filter or load

10.5

20

mA

IPVDD_X

Half-bridge idle current

Reset mode, no switching

594

713

μA

Output Stage MOSFETs

Drain-to-source resistance, Low

RDSon,LS

TJ = 25°C, excludes metallization resistance,

110

125

m

Ω

Side

Drain-to-source resistance, High

RDSon,HS

TJ = 25°C, excludes metallization resistance,

110

125

m

Ω

Side

I/O Protection

Undervoltage protection limit,

Vuvp,G

9.5

V

GVDD_X

Vuvp,hyst

(1)

Undervoltage protection limit,

250

mV

GVDD_X

BSTuvpF

Puts device into RESET when BST

6.11

V

voltage falls below limit

BSTuvpR

Brings device out of RESET when

7.25

V

BST voltage rises above limit

OTW(1)

Overtemperature warning

115

125

135

°C

Temperature drop needed below

OTWHYST

(1)

OTW temp. for OTW to be inactive

25

°C

after the OTW event

OTE(1)

Overtemperature error threshold

145

155

165

°C

OTE-

OTE - OTW differential, temperature

30

°C

OTWdifferential

(1)

delta between OTW and OTE

OLPC

Overload protection counter

fS = 384 kHz

1.25

ms

Resistor—programmable, high-end,

IOC

Overcurrent limit protection

7.9

8.4

A

ROC = 22 kΩ with 1 ms pulse, TC= 75°C

IOCT

Overcurrent response time

150

ns

tACTIVITY

Time for PWM activity detector to

Lack of transistion of any PWM input

13.2

μS

DETECTOR

activate when no PWM is present

(1)

Specified by design

10

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Product Folder Link(s): TAS5342L

Not Recommended for New Designs