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STM32L412C8I6TR bảng dữ liệu(PDF) 109 Page - STMicroelectronics

tên linh kiện STM32L412C8I6TR
Giải thích chi tiết về linh kiện  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 100DMIPS, up to 128KB Flash, 40KB SRAM, analog, ext. SMPS
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STM32L412C8I6TR bảng dữ liệu(HTML) 109 Page - STMicroelectronics

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DS12469 Rev 4
109/192
STM32L412xx
Electrical characteristics
163
APB1
I2C1 independent clock domain
3.4
2.8
3.3
µA/MHz
I2C1 clock domain
1.0
0.9
0.9
I2C2 independent clock domain
3.4
2.8
3.3
I2C2 clock domain
1.0
0.9
0.9
I2C3 independent clock domain
2.8
2.3
2.4
I2C3 clock domain
0.9
0.4
0.7
LPUART1 independent clock
domain
1.8
1.6
1.7
LPUART1 clock domain
0.6
0.6
1.7
LPTIM1 independent clock
domain
2.8
2.3
2.7
LPTIM1 clock domain
0.8
0.4
0.7
LPTIM2 independent clock
domain
2.9
2.6
3.8
LPTIM2 clock domain
0.8
0.7
0.8
OPAMP
0.4
0.2
0.4
PWR
0.4
0.1
0.4
SPI2
1.7
1.5
1.5
SPI3
1.7
1.4
1.5
TIM2
6.2
5.0
5.8
TIM6
1.0
0.6
0.9
USART2 independent clock
domain
4.0
3.5
3.7
USART2 clock domain
1.3
0.8
1.1
USART3 independent clock
domain
4.2
3.4
4.1
USART3 clock domain
1.5
1.1
1.3
WWDG
0.5
0.5
0.5
All APB1 on
41.4
28.5
38.9
Table 49. Peripheral current consumption (continued)
Peripheral
Range 1
Range 2
Low-power run
and sleep
Unit



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