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STM32L412C8I6TR bảng dữ liệu(PDF) 78 Page - STMicroelectronics |
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STM32L412C8I6TR bảng dữ liệu(HTML) 78 Page - STMicroelectronics |
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78 / 192 page ![]() Electrical characteristics STM32L412xx 78/192 DS12469 Rev 4 6.3.2 Operating conditions at power-up / power-down The parameters given in Table 22 are derived from tests performed under the ambient temperature condition summarized in Table 21. 6.3.3 Embedded reset and power control block characteristics The parameters given in Table 23 are derived from tests performed under the ambient temperature conditions summarized in Table 21: General operating conditions. TA Ambient temperature for the suffix 6 version Maximum power dissipation –40 85 °C Low-power dissipation(5) –40 105 Ambient temperature for the suffix 3 version Maximum power dissipation –40 125 Low-power dissipation(5) –40 130 TJ Junction temperature range Suffix 6 version –40 105 °C Suffix 3 version –40 130 1. When RESET is released functionality is guaranteed down to VBOR0 Min. 2. This formula has to be applied only on the power supplies related to the IO structure described by the pin definition table. Maximum I/O input voltage is the smallest value between Min(VDD, VDDA, VDDUSB)+3.6 V and 5.5V. 3. For operation with voltage higher than Min (VDD, VDDA, VDDUSB) +0.3 V, the internal Pull-up and Pull-Down resistors must be disabled. 4. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax (see Section 7.8: Thermal characteristics). 5. In low-power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see Section 7.8: Thermal characteristics). Table 21. General operating conditions (continued) Symbol Parameter Conditions Min Max Unit Table 22. Operating conditions at power-up / power-down Symbol Parameter Conditions Min Max Unit tVDD VDD rise time rate - 0 ∞ µs/V VDD fall time rate ULPEN = 0 10 ∞ ULPEN = 1 100 ∞ ms/V tVDDA VDDA rise time rate - 0 ∞ µs/V VDDA fall time rate 10 ∞ tVDDUSB VDDUSB rise time rate - 0 ∞ VDDUSB fall time rate 10 ∞ Table 23. Embedded reset and power control block characteristics Symbol Parameter Conditions(1) Min Typ Max Unit tRSTTEMPO(2) Reset temporization after BOR0 is detected VDD rising - 250 400 μs VBOR0(2) Brown-out reset threshold 0 Rising edge 1.62 1.66 1.7 V Falling edge 1.6 1.64 1.69 |
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