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DSP56720 bảng dữ liệu(PDF) 33 Page - Freescale Semiconductor, Inc

tên linh kiện DSP56720
Giải thích chi tiết về linh kiện  SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
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DSP56720 bảng dữ liệu(HTML) 33 Page - Freescale Semiconductor, Inc

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SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors, Rev.1
Freescale Semiconductor
33
Figure 25. GPIO Timing Diagram
2.2.7
JTAG Timing
See Table 16 for joint test action group (JTAG) timing parameters, and Figure 26, Figure 27, and Figure 28 for timing diagrams.
105
Minimum GPIO pulse low width
2 x TC
10
–
ns
106
GPIO out rise time
–
–
13.0
ns
107
GPIO out fall time
–
–
13.0
ns
Notes:
1.
VCORE_VDD = 1.0 V ± 0.10 V; TJ = -40°C to 125°C; CL = 50 pF
Table 16. JTAG Timing Parameters
No.
Characteristics
All Frequencies
Unit
Min
Max
108
TCK frequency of operation (1/(TC × 3); maximum 10 MHz)
–
10.0
MHz
109
TCK cycle time in Crystal mode
100.0
–
ns
110
TCK clock pulse width measured at 1.65 V
50.0
–
ns
111
TCK rise and fall times
–
3.0
ns
112
Boundary scan input data setup time
15.0
–
ns
113
Boundary scan input data hold time
24.0
–
ns
114
TCK low to output data valid
–
40.0
ns
115
TCK low to output high impedance
–
40.0
ns
Table 15. GPIO Timing (Continued)Parameters
No.
Characteristics1
Expression
Min
Max
Unit
100
101
102
103
104
105
106
107
Fsys
Valid
GPIO
(Output)
GPIO
Input)
GPIO
(Output)



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