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FS32K112BFT0M bảng dữ liệu(PDF) 28 Page - NXP Semiconductors |
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FS32K112BFT0M bảng dữ liệu(HTML) 28 Page - NXP Semiconductors |
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28 / 85 page ![]() Table 16. Device clock specifications 1 (continued) Symbol Description Min. Max. Unit fBUS Bus clock — 48 MHz fFLASH Flash clock — 24 MHz Normal run mode (S32K14x series) 3 fSYS System and core clock — 80 MHz fBUS Bus clock — 404 MHz fFLASH Flash clock — 26.67 MHz VLPR mode (S32K1xx series)5 fSYS System and core clock — 4 MHz fBUS Bus clock — 4 MHz fFLASH Flash clock — 1 MHz fERCLK External reference clock — 16 MHz 1. Refer to the section Feature comparison for the availability of modes and other specifications. 2. Only available on some devices. See section Feature comparison. 3. With SPLL as system clock source. 4. 48 MHz when fSYS is 48 MHz 5. The frequency limitations in VLPR mode here override any frequency specification listed in the timing specification for any other module. Peripheral operating requirements and behaviors 6.1 System modules There are no electrical specifications necessary for the device's system modules. Clock interface modules 6.2.1 External System Oscillator electrical specifications 6 6.2 Peripheral operating requirements and behaviors S32K1xx Data Sheet, Rev. 11, 06/2019 28 NXP Semiconductors |
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