AX88796BLF datasheet(47/82 Pages) ASIX

47 / 82 page

ASIX ELECTRONICS CORPORATION

AX88796BLF / AX88796BLI

MPEN

Magic Packet wake-up enables.

0: disable (Default)

1: enable

5.1.56 Power Management Register (PMR)

Page3 Offset 0BH (Read/Write)

Field

Name

Description (Default = 00h)

7:5

Reserved

REGSTB

0: Regulator in normal mode (Default)

1: Regulator in standby mode

3:2

Reserved

1:0

PMM

Power Management Mode, Self clear when wake-up

00: Normal Operation (Default)

01: D1 power saving. Supported Link status change, Wake-up and Magic frame for

remote wake-up

10: D2 power saving. Only write host wake-up register (offset 1Fh) to leave D2 state.

11: Reserved. Do not set this mode.

5.1.57 Reload EEPROM Register (REER)

Page3 Offset 0CH (Write)

Field

Name

Description

7:1

Reserved

REER

Reload EEPROM

Host set this bit to active reload EEPROM process. And it will auto clear by it self.

5.1.58 Misc. Control Register (MISC)

Page3 Offset 0DH (Write/Read)

Field

Name

Description (Default = 00h)

7:3

Reserved

GPTE

General Purpose Timer Enable

0: Disable (Default)

1: Enable

BCB1

Burst Cycle Base On SA1 or SA0

0: Base on SA0 (Default)

1: Base on SA1

TBR

Transmit Buffer Ring Enable

0: Remote DMA write can write any where of embedded memory. (Default)

1: Remote DMA write transmit buffer as a Ring from page 40h to PSTART –1.

5.1.59 General Purpose Timer0 Register (GPT0)

Page3 Offset 0EH (Write/Read)

Field

Name

Description (Default = FFh)

7:0

General Purpose Timer [7:0]

5.1.60 General Purpose Timer1 Register (GPT1)

Page3 Offset 0FH (Write/Read)

Field

Name

Description (Default = FFh)

7:0

General Purpose Timer [15:8]

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