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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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AX88796BLF bảng dữ liệu(PDF) 31 Page - ASIX Electronics Corporation |
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AX88796BLF bảng dữ liệu(HTML) 31 Page - ASIX Electronics Corporation |
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31 / 82 page  ASIX ELECTRONICS CORPORATION 31 AX88796BLF / AX88796BLI PAGE 0 (PS1=0,PS0=0) Offset Read Write 00H Command Register (CR) Command Register (CR) 01H Rx Page Start Register (PSTART) Page Start Register (PSTART) 02H Rx Page Stop Register (PSTOP) Page Stop Register (PSTOP) 03H Boundary Pointer (BNRY) Boundary Pointer (BNRY) 04H Transmit Status Register (TSR) Transmit Page Start Address (TPSR) 05H Number of Collisions Register (NCR) Transmit Byte Count Register 0 (TBCR0) 06H Current Page Register (CPR) Transmit Byte Count Register 1 (TBCR1) 07H Interrupt Status Register (ISR) Interrupt Status Register (ISR) 08H Current Remote DMA Address 0 (CRDA0) Remote Start Address Register 0 (RSAR0) 09H Current Remote DMA Address 1 (CRDA1) Remote Start Address Register 1 (RSAR1) 0AH Reserved Remote Byte Count 0 (RBCR0) 0BH Reserved Remote Byte Count 1 (RBCR1) 0CH Receive Status Register (RSR) Receive Configuration Register (RCR) 0DH Frame Alignment Error Tally Register (CNTR0) Transmit Configuration Register (TCR) 0EH CRC Error Tally Register (CNTR1) Data Configuration Register (DCR) 0FH Frames Lost Tally Register (CNTR2) Interrupt Mask Register (IMR) 11H, 10H Data Port (DP) Data Port (DP) 12H Inter-frame Gap Segment 1 (IFGS1) Inter-frame Gap Segment 1 (IFGS1) 13H Inter-frame Gap Segment 2 (IFGS2) Inter-frame Gap Segment 2 (IFGS2) 14H MII/EEPROM Access MII/EEPROM Access 15H Buffer Type Configure Register (BTCR) Buffer Type Configure Register (BTCR) 16H Inter-frame Gap (IFG) Inter-frame Gap (IFG) 17H Device Status Register (DSR) Back-pressure Jam Limit count (BJLC) 18H Max Frame Size [7:0] Max Frame Size [7:0] 19H Max Frame Size [11:8] Max Frame Size [11:8] 1AH Flow Control Register (FCR) Flow Control Register (FCR) 1BH MAC Configure Register (MCR) MAC Configure Register (MCR) 1CH Current TX End Page Register (CTEPR) VLAN_ID_0 1DH Reserved VLAN_ID_1 1EH Reserved Big-Endian Register (BER) 1FH Software Reset Host Wake up (HWAKE) Tab - 13 Page 0 of MAC Core Registers Mapping |
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