EM78452WM datasheet(14/54 Pages) EMC

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EM78452

8-Bit Microcontroller

•

Product Specification (V1.0) 10.18.2007

(This specification is subject to change without further notice)

5.1.13 RF (PWP: Pulse Width Preset Register)

Address Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0x0F

PWP/RF PWP7

PWP6

PWP5

PWP4

PWP3

PWP2

PWP1

PWP0

PWP7~PWP0 are the set of bits with pulse width preset in advance for the desired

width of the baud clock.

5.1.14 R20~R3E (General-purpose Register)

RA~R1F, and R20~R3E (including Banks 0~3) are general-purpose registers.

5.1.15 R3F (Interrupt Status Register)

Address Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0x3F

ISR/R3F

TM1IF

SPIIF

EXIF

TCIF

Bits 7~4: not used, read as “0”.

Bit 3 (TM1IF): Timer 1 interrupt flag. Set by the comparator at Timer 1 application, flag

is cleared by software.

Bit 2 (SPIIF): SPI interrupt flag. Set during data transmission completed, flag is

cleared by software.

Bit 1 (EXIF): External interrupt flag. Set by a falling edge on the /INT pin, flag is cleared

by software

Bit 0 (TCIF): TCC overflow interrupt flag. Set as TCC overflows; flag is cleared by

software.

0 : means no interrupt occurs

1 : means with interrupt request

R3F can be cleared by instruction, but cannot be set by instruction.

IOCF is the interrupt mask register.

Note that when reading R3F it will result to "logic AND" of R3F and IOCF.

PSR2

PSR1

PSR0

TCC Rate

WDT Rate

1:2

1:1

1:4

1:2

1:8

1:4

1:16

1:8

1:32

1:16

1:64

1:32

1:128

1:64

1:256

1:128

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