EM78452WM datasheet(21/54 Pages) EMC

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EM78452

8-Bit Microcontroller

Product Specification (V1.0) 10.18.2007

• 17

(This specification is subject to change without further notice)

PDRD

CLK

PCW R

PDW R

CLK

IOD

ROC

VCC

W eakly

Pull-up

PORT

Rex*

*The Rex is 560K ohm external resistor

PCRD

Fig. 4-6(b) The Circuit of I/O Port with R-option (P80, P81)

5.5 Serial Peripheral Interface Mode

5.5.1 Overview & Features

Overview:

Figures 4-7, 4-8, and 4-9 shows how the EM78452 communicates with other devices

through SPI module. If EM78452 is a master controller, it sends clock through the SCK

pin. A couple of 8-bit data are transmitted and received at the same time. However, if

EM78452 is defined as a slave, its SCK pin could be programmed as an input pin. Data

will continue to be shifted based on both the clock rate and the selected edge. In Slave

mode when code option bit 7 (SPIHSK) is set to 0, the P91 (HSK) pin will be set to high

after SPI enable and SSE bit set to 1. You can also set SPIS bit 7(DORD) to decide the

SPI transmission order, SPIC bit3 (SDOC) to control SDO pin after serial data output

status and SPIS bit 6 (TD1), bit 5 (TD0) decides the SDO status output delay times.

Those three functions mentioned can work however; it must be based on code option

bit5 (SDOS) set to 0.

Features:

Operation in either Master mode or Slave mode

Three-wire or four-wire synchronous communication; that is, full duplex

Programmable baud rates of communication

Programming clock polarity, (RD bit7)

Interrupt flag available for the read buffer full

SPI transmission order

EM78452WM bảng dữ liệu(PDF) 21 Page - ELAN Microelectronics Corp