EM78452WM datasheet(10/54 Pages) EMC

10 / 54 page

EM78452

8-Bit Microcontroller

•

Product Specification (V1.0) 10.18.2007

(This specification is subject to change without further notice)

5.1.4 R3 (Status Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PS1

PS0

Bit 7 (GP): General read/write bit.

Bits 6 ~ 5 (PS1 ~ PS0): Page select bits. PS0~PS1 are used to pre-select a program

memory page. When executing a "JMP", "CALL", or other instructions which

causes the program counter to be changed (e.g. MOV R2, A), PS0~PS1 are

loaded into the 11th and 12th bits of the program counter where it selects

one of the available program memory pages. Note that RET (RETL, RETI)

instruction does not change the PS0~PS1 bits. For this reason, the return

will always be to the page from where the subroutine was called, regardless

of the current settings of PS0~PS1 bits. PS1 bit is not used (read as "0") and

cannot be modified in EM78452.

PS1

PS0

Program Memory Page [Address]

Page 0 [000-3FF]

Page 1 [400-7FF]

Page 2 [800-BFF]

Page 3 [C00-FFF]

Bit 4 (T): Time-out bit. Set to “1” with the "SLEP" and the "WDTC" commands, or

during power up and reset to “0” with the WDT timeout.

Bit 3 (P): Power down bit. Set to “1” during power on or by a "WDTC" command and

reset to “0” by a "SLEP" command.

Bit 2 (Z): Zero flag. Set to "1" if the result of an arithmetic or logic operation is zero.

Bit 1 (DC): Auxiliary carry flag

Bit 0 (C): Carry flag

5.1.5 R4 (RAM Select Register)

Bits 7~6: determines which bank is activated among the 4 banks.

Bits 5~0: are used to select the registers (Address: 00~3F) in the indirect addressing

mode.

If indirect addressing is not used, the RSR is used as an 8-bit general-purpose

read/writer register.

See the data memory configuration in Fig. 5-3.

5.1.6 R5~R8 (Port 5 ~ Port 8)

Four general 8 bits I/O registers

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