ATSHA204A datasheet(36/93 Pages) MICROCHIP

36 / 93 page

Table 7-2. AC Parameters — All I/O Interfaces

Parameter

Symbol

Direction

Min Typ Max Unit Notes

Wake Low

Duration

tWLO

To Crypto

Authentication

—

μs

SDA can be stable in either

high or low levels during

extended sleep intervals.

Power-Up Delay tPU

To Crypto

Authentication

100(1)

μs

Minimum time between VCC >

VCC min prior to

measurement of tWLO.

Wake High

Delay to Data

Comm.

tWHI

To Crypto

Authentication

2.5

SDA should be stable high

for this entire duration.

High Side Glitch

Filter at Active

tHIGNORE_A To Crypto

Authentication

Pulses shorter than this in

width are ignored by the

device, regardless of its state

when active.

Low Side Glitch

Filter at Active

tLIGNORE_A To Crypto

Authentication

Pulses shorter than this in

width are ignored by the

device, regardless of its state

when active.

High Side Glitch

Filter at Sleep

tHIGNORE_S To Crypto

Authentication

μs

Pulses shorter than this in

width are ignored by the

device when in sleep mode.

Low Side Glitch

Filter at Sleep

tLIGNORE_S To Crypto

Authentication

μs

Pulses shorter than this in

width are ignored by the

device when in sleep mode.

Watchdog Reset tWATCHDOG To Crypto

Authentication

0.7(1) 1.3 1.7

Max. time from wake until

device is forced into sleep

mode (See Section

Watchdog Failsafe).

Note:

These parameters are guaranteed through characterization, but not tested.

ATSHA204A

Electrical Characteristics

DS40002025A-page 36

ATSHA204A bảng dữ liệu(PDF) 36 Page - Microchip Technology

ATSHA204A bảng dữ liệu(HTML) 36 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93

bảng dữ liệu tải về

Link URL