TMP86FS64FG datasheet(77/252 Pages) TOSHIBA

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Page 65

TMP86FS64FG

5.7 Port P6 (P67to P60)

Port P6 is an 8-bit input/output port, which can be configured individually as an input or an output under software

control. Port P6 is also used as an analog input. Input/output mode is specified by the corresponding bit in the port P6

input/output control register (P6CR), P6 output latch (P6DR) and ADCCR1<AINDS>. During reset, P6CR and

P6DR are initialized to “0” and ADCCR1<AINDS> is set to “1”. At the same time, the input data of P67 to P60 are

fixed to “0” level. When port P6 is used as input port, the corresponding bit in P6CR and P6DR should be set to input

mode (P6CR = “0”, P6DR = “1”). When used as output port, the corresponding bit in P6CR should be set to “1”.

When used as analog input port, the corresponding bit in P6CR and P6DR should be set to analog input mode (P6CR

= “0”, P6DR = “0”) and ADCCR1<AINDS> is set to “0”, then the AD conversion is started. Setting P6DR to “0” is

necessary to prevent generating the penetration electric current. So the output latch of the port used as analog input

should be set to “0” beforehand. Actually selection of the conversion input channels is specified by

ADCCR1<SAIN>.

Pins used for analog input can be used as I/O port. During AD conversion, output instructions should not be exe-

cuted to keep a precision. In addition, a variable signal should not be input to a port adjacent to the analog input dur-

ing AD conversion.

When the AD converter is in use (P6DR = “0”), bits mentioned above are read as “0” by executing input instruc-

tions.

Note 1: i = 7 to 0

Note 2: STOP: bit 7 in SYSCR1, OUTEN: bit 4 in SYSCR1

Note 3: SAIN: AD input channel select signal

Figure 5-8 Port P6

Analog input

Pull-up resistor

(Typ. 80 k

Ω)

AINDS

SAIN

STOP

OUTEN

Data input

Data output

P6CRi

P6i

P6PUi

VDD

Output latch

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