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TMP88CS38 bảng dữ liệu(PDF) 75 Page - Toshiba Semiconductor |
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TMP88CS38 bảng dữ liệu(HTML) 75 Page - Toshiba Semiconductor |
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75 / 226 page ![]() TMP88CS38/CM38A/CP38A 2007-09-12 88CS38-75 2.7.2 Control The timer/counter 3 is controlled by a timer/counter 3 control register (TC3CR) and two 8-bit timer registers (TC3DRA and TC3DRB) and port multiplex control register (PMPXCR). 7 6 5 4 3 2 1 0 TC3DRA (0018H) Read/Write (Initial value: 1111 1111) TC3DRB (0019H) Read only (Initial value: 1111 1111) 7 6 5 4 3 2 1 0 TC3CR (001AH) ACAP TC3S TC3K TC3M (Initial value: *0*0 0000) TC3M TC3 operating mode select 0: Timer/event counter 1: Capture NORMAL, IDLE mode DV1CK = 0 DV1CK = 1 000 fc/2 13 fc/2 14 001 fc/2 12 fc/2 13 010 fc/2 11 fc/2 12 011 fc/2 10 fc/2 11 100 fc/2 9 fc/2 10 101 fc/2 8 fc/2 9 110 fc/2 7 fc/2 8 TC3CK TC3 source clock select [Hz] 111 External clock (TC3 pin input) TC3S TC3 start control 0: Stop and clear 1: Start ACAP Auto-capture control 0: − 1: Auto-capture enable Write only Note 1: fc: High-frequency clock [Hz], *: Don’t care. Note 2: Set the mode and source clock when the TC3 stops (TC3S = 0). Note 3: Values to be loaded to timer register 3A must satisfy the following condition TC3DRA > 0 (in the timer and event counter mode). Note 4: Auto-capture can be used only int the timer and event counter mode. Note 5: Before setting TC3DRA or switching the operation mode, stop the TC3 (TC3S = 0). Note 6: When STOP mode is started, timer counter is stopped and TC3 start control (TC3S) is cleared to “0” automatically. Set TC3S to “1” after STOP mode is released for restarting timer counter. Note 7: TC3CR, TCESCR is a write-only register and must not be used with any of the read-modify-write instructions. 7 6 5 4 3 2 1 0 PMPXCR (0027H) “0” CHS TC4ES TC3ES (Initial value: 00** **00) TC3ES TC3 input control 0: Normal 1: Invert Write only Note 8 Always write “0” to bit7 in PMPXCR. Figure 2.7.2 Timer Registers 3 and TC3 Control Register |
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