25PE20VP datasheet(6/60 Pages) STMICROELECTRONICS

6 / 60 page

Description

M25PE20, M25PE10

6/60

Description

The M25PE20 and M25PE10 are 2 Mbit (256 Kb × 8 bit) and 1 Mbit (128 Kb × 8 bit) Serial

Paged Flash memories, respectively. They are accessed by a high speed SPI-compatible

bus.

The memories can be written or programmed 1 to 256 Bytes at a time, using the Page Write

or Page Program instruction. The Page Write instruction consists of an integrated Page

Erase cycle followed by a Page Program cycle.

The M25PE20 memory is organized as 4 sectors, each containing 256 pages. Each page is

256 Bytes wide. Thus, the whole memory can be viewed as consisting of 1024 pages, or

262,144 Bytes.

The M25PE10 memory is organized as 2 sectors, each containing 256 pages. Each page is

256 Bytes wide. Thus, the whole memory can be viewed as consisting of 512 pages, or 131,

072 Bytes.

The memories can be erased a page at a time, using the Page Erase instruction, a

subsector at a time, using the SubSector Erase instruction, a sector at a time, using the

Sector Erase instruction or as a whole, using the Bulk Erase instruction.

The memory can be Write Protected by either Hardware or Software using a mix of volatile

and non-volatile protection features, depending on the application needs. The protection

granularity is of 64 Kbytes (sector granularity).

In order to meet environmental requirements, ST offers the M25PE20 and M25PE10 in

ECOPACK® packages. ECOPACK® packages are Lead-free and RoHS compliant.

ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

Important note

This datasheet details the functionality of the M25PE20 and M25PE10 devices, based on

the previous T7X process or based on the current T9HX process. Delivery of parts in T9HX

process starts from August 2007.

What are the changes?

The M25PE10/M25PE20 in T9HX process offers the following additional features:

●

the whole memory array is partitioned into 4-Kbyte subsectors

●

five new instructions: Write Status Register (WRSR), Write to Lock Register (WRLR),

Read Lock Register (RDLR), 4-Kbyte SubSector Erase (SSE) and Bulk Erase (BE)

●

Status Register: 3 bits can be written (BP0, BP1, SRWD)

●

WP input (pin 3): Write protection limits are extended, depending on the value of the

BP0, BP1, SRWD bits. The WP Write protection remains the same if bits (BP1, BP0)

are set to (0, 1) or (1, 0)

●

VFQFPN8 6 × 5 mm package added

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