405EX datasheet(65/67 Pages) AMCC

65 / 67 page

PPC405EX – PowerPC 405EX Embedded Processor

Revision 1.09 - August 21, 2007

AMCC Proprietary

Preliminary Data Sheet

Initialization

The following describes the method by which initial chip settings are established when a system reset occurs.

Strapping

When the SysReset input is driven low (system reset), the state of certain I/O pins is read in order to enable default

initial conditions before PPC405EX start-up. The actual instant of capture is the nearest system clock edge before

the deassertion of reset. These pins must be strapped using external pull-up (logical 1) or pull-down (logical 0)

resistors to select the desired default conditions. The recommended pull-up is 3k

Ω to +3.3V, or 10kΩ to +5V. The

recommended pull-down is 1K

Ω to GND. These pins are only used for strap functions during reset. They are used

for other signals during normal operation. The following table lists the strapping pins along with their functions and

strapping options. The signal names assigned to the pins for normal operation appear below the pin number.

Table 25. Strapping Pin Assignments

Pin Strapping

Initialization Source

Option

F04

(UART0DCD)

F02

(UART0DSR)

G02

(UART0CTS)

EBC 8-bit wide ROM

EBC 16-bit wide ROM

EBC 8-bit wide NAND Flash

IIC ROM at address 0xA8

EBC 8-bit wide ROM

IIC ROM at address 0xA4

Note: See the PPC405EX Embedded Processor User’s Manual for option descriptions and other details regarding the boot process.

405EX bảng dữ liệu(PDF) 65 Page - Applied Micro Circuits Corporation