405EX datasheet(57/67 Pages) AMCC

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PPC405EX – PowerPC 405EX Embedded Processor

Revision 1.09 - August 21, 2007

AMCC Proprietary

Preliminary Data Sheet

Table 18. I/O Specifications—333 MHz to 667 MHz CPU

Notes:

1. PerClk rising edge at package pin with a 10pF load trails the internal PLB clock by approximately 0.8ns.

Signal

Input (ns)

Output (ns)

Output Current (mA)

Clock

Notes

Setup Time

(TIS min)

Hold Time

(TIH min)

Valid Delay

(TOV max)

Hold Time

(TOH min)

IOH

(minimum)

IOL

(minimum)

External Peripheral Interface

PerClk

11.08

7.37

PLB Clk

PerAddr05:31

2.3

5.3

11.08

7.37

PerClk

PerCS0:3

2.3

5.3

11.08

7.37

PerClk

PerData00:31

2.3

5.3

11.08

7.37

PerClk

PerDataPar0:3

2.3

5.3

11.08

7.37

PerClk

PerOE

2.3

5.3

11.08

7.37

PerClk

PerReady

2.3

5.3

PerClk

PerRW

2.3

5.3

11.08

7.37

PerClk

PerWBE0:3

2.3

5.3

11.08

7.37

PerClk

PerBLast

2.3

5.3

11.08

7.37

PerClk

PerErr

2.3

5.3

11.08

7.37

PerClk

ExtReset

2.3

5.3

11.08

7.37

PerClk

BusReq

2.3

5.3

11.08

7.37

PerClk

HoldReq

2.3

5.3

11.08

7.37

PerClk

HoldAck

2.3

5.3

11.08

7.37

PerClk

ExtAck

2.3

5.3

11.08

7.37

ExtReq

2.3

5.3

11.08

7.37

NFALE

2.3

5.3

11.08

7.37

NFCE0:3

2.3

5.3

11.08

7.37

NFCLE

2.3

5.3

11.08

7.37

NFData0:15

2.3

5.3

11.08

7.37

NFRdyBusy

2.3

5.3

11.08

7.37

NFREn

2.3

5.3

11.08

7.37

NFWEn

2.3

5.3

11.08

7.37

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