PM5366-PI datasheet(163/267 Pages) PMC

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PRELIMINARY

PM5366 TEMAP-84

DATASHEET

PMC-2010672

ISSUE 1

HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER

AND M13 MULTIPLEXER

PROPRIETARY AND CONFIDENTIAL

151

Table 14

- Indexing for 2.048 Mbit/s Tributaries

SBI Bus

SPE, LINK

Telecom Bus

TUG-3, TUG-2,

TU12

M13

DS3, DS2, E1

1,1

1,1,1

1,2

1,2,1

1,1,2

1,3

1,3,1

1,1,3

1,4

1,4,1

1,2,1

1,5

1,5,1

1,2,2

1,6

1,6,1

1,2,3

1,7

1,7,1

1,3,1

1,8

1,1,2

1,3,2

1,9

1,2,2

1,3,3

1,10

1,3,2

1,4,1

1,11

1,4,2

1,12

1,5,2

1,4,3

1,13

1,6,2

1,5,1

1,14

1,7,2

1,5,2

1,15

1,1,3

1,5,3

1,16

1,2,3

1,6,1

1,17

1,3,3

1,6,2

1,18

1,4,3

1,6,3

1,19

1,5,3

1,7,1

1,20

1,6,3

1,7,2

1,21

1,7,3

2,1

2,1,1

...

12.2 Clock and Frame Synchronization Constraints

Depending on the modes of operation utilized, some coordination between

LREFCLK, SREFCLK, LAC1, LDC1J1V1, SDC1FP and SAC1FP is required.

Specifically, tighter constraints must be respected when supporting transparent

virtual tributaries (TVTs) or 77.76 MHz buses.

The following only applies when using the Telecom Bus. LREFCLK may be tied

low when support is limited to DS3/E3 serial line interfaces.

12.2.1 SBI and Telecom Buses Both 19.44 MHz

The rising and falling edges of LREFCLK must be aligned with a tolerance of +/-

10ns to the corresponding edges of SREFCLK.

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