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PM5366-PI bảng dữ liệu(PDF) 100 Page - PMC-Sierra, Inc

tên linh kiện PM5366-PI
Giải thích chi tiết về linh kiện  HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
PDF  267 Pages
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nhà sản xuất  PMC [PMC-Sierra, Inc]
Trang chủ  http://www.pmc-sierra.com
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PM5366-PI bảng dữ liệu(HTML) 100 Page - PMC-Sierra, Inc

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PRELIMINARY
PM5366 TEMAP-84
DATASHEET
PMC-2010672
ISSUE 1
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL
88
register. Note that the DS2 framer is an off-line framer, indicating both OOF and
COFA. Error events continue to be indicated even when the FRMR is indicating
OOF, based on the previous frame alignment.
The RED alarm and alarm indication signal are detected by the DS2 FRMR in
9.9 ms for DS2 format. The framer employs a simple integration algorithm (with
a 1:1 slope) that is based on the occurrence of "valid" DS2 M-frame intervals.
For the RED alarm, a DS2 M-frame is said to be a "valid" interval if it contains a
RED defect, defined as the occurrence of an OOF event during that M-frame.
For AIS, a DS2 M-frame is said to be a "valid" interval if it contains AIS, defined
as the occurrence of less than 9 zeros while the framer is out of frame during
that M-frame. The discrepancy threshold ensures the detection algorithm
operates in the presence of bit error rates of up to 10-3. Each "valid" DS2 M-
frame causes an integration counter to increment; "non-valid" DS2 M-frame
intervals cause a decrement. RED or AIS is declared if the associated integrator
count saturates at 53, resulting in a detection time of 9.9 ms. RED or AIS
declaration is deasserted when the associated count decrements to 0.
The DS2 X-bit is extracted by the DS2 FRMR to provide an indication of far end
receive failure. The FERF status is set to the current X/RAI state only if the two
successive X/RAI bits were in the same state. The extracted FERF status is
buffered for 6 DS2 M-frames before being reported within the DS2 FRMR Status
register. This buffer ensures a virtually 100% probability of freezing the FERF
status in a valid state during an out of frame occurrence. When an OOF occurs,
the FERF value is held at the state contained in the last buffer location
corresponding to the previous sixth M-frame. This location is not updated until
the OOF condition is deasserted. Meanwhile, the last four of the remaining five
buffer locations are loaded with the frozen FERF state while the first buffer
location corresponding to the current M-frame is continually updated every M-
frame based on the above FERF definition. Once correct frame alignment has
been found and OOF is deasserted, the first buffer location will contain a valid
FERF status and the remaining five buffer locations are enabled to be updated
every M-frame.
DS2 M-bit and F-bit framing errors are indicated. These error indications are
accumulated for performance monitoring purposes in internal, microprocessor
readable counters. The performance monitoring accumulators continue to count
error indications even while the framer is indicating OOF.
The DS2 FRMR may be configured to generate interrupts on error events or
status changes. All sources of interrupts can be masked or acknowledged via
internal registers. Internal registers are also used to configure the DS2 FRMR.



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