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PM5366-PI bảng dữ liệu(PDF) 52 Page - PMC-Sierra, Inc

tên linh kiện PM5366-PI
Giải thích chi tiết về linh kiện  HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
PDF  267 Pages
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nhà sản xuất  PMC [PMC-Sierra, Inc]
Trang chủ  http://www.pmc-sierra.com
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PM5366-PI bảng dữ liệu(HTML) 52 Page - PMC-Sierra, Inc

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PRELIMINARY
PM5366 TEMAP-84
DATASHEET
PMC-2010672
ISSUE 1
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL
40
Pin Name
Type
Pin
No.
Function
LADATA[0]
LADATA[1]
LADATA[2]
LADATA[3]
LADATA[4]
LADATA[5]
LADATA[6]
LADATA[7]
Output
Tristate
W14
Y13
AA13
AB13
W13
AA12
W12
W11
Line Add Bus Data (LADATA[7:0]). The add bus data
contains the SONET transmit payload data in byte
serial format. All transport overhead bytes are set to
00h. The phase relation of the SPE (VC) to the
transport frame is determined by the Add Bus
composite timing signal LAC1J1V1 and is software
programmable to any valid pointer offset. LADATA[7] is
the most significant bit (corresponding to bit 1 of each
serial word, the first bit to be transmitted).
By default, LADATA[7:0] is only asserted during the
SONET/SDH tributaries assigned to this device as
determined by the LAOE bit in the TTMP Tributary
Control registers. As options, LADATA[7:0] can be
driven during transport overhead, for all bytes of an
STM-1 when configured for 77.76MHz operation or all
the time.
LADATA[7:0] is updated on the rising edge of
LREFCLK.
LADP
Output
Tristate
AB14 Line Add Bus Data Parity (LADP). The Add Bus data
parity signal carries the parity of the outgoing signals.
The parity calculation encompasses the LADATA[7:0]
bus and optionally the LAC1J1V1 and LAPL signals.
LAC1J1V1 and LAPL can be included in the parity
calculation by setting the INCLAC1J1V1 and INCLAPL
register bits in the SONET/SDH Master Egress
Configuration register high, respectively. Odd parity is
selected by setting the LAOP register bit in the same
register high and even parity is selected by setting the
LAOP bit low.
By default, LADP is only asserted during the
SONET/SDH tributaries assigned to this device as
determined by the LAOE bit in the TTMP Tributary
Control registers. As options, LADP can be driven
during transport overhead, for all bytes of an STM-1
when configured for 77.76MHz operation or all the
time.
LADP is updated on the rising edge of LREFCLK.



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