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CS44800 bảng dữ liệu(PDF) 63 Page - Cirrus Logic |
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CS44800 bảng dữ liệu(HTML) 63 Page - Cirrus Logic |
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63 / 80 page ![]() DS632F1 63 CS44800 7.19 Chnl XX Load Compensation Filter - Fine Adjust (addresses 19h, 1Bh, 1Dh, 1Fh, 21h, 23h, 25h, 27h) 7.19.1 Channel Compensation Filter - Fine Adjust (CHXX_FINE[5:0]) Default = 000000 Function: The Channel Load Compensation Filter Fine Adjustment settings control the amount of attenuation of this single-pole filter which follows the Coarse Adjustment Compensation Filter. These bits are used in con- junction with the Coarse Adjustment bits to fine tune the total frequency response of the system to com- pensate for speaker impedance load variations. Each PWM channel is controlled by an associated register. The fine adjustment bits will attenuate the audio response curve according to the table below in 0.1 dB increments. Filter setting values less than -4.0 dB will cause the PWM output to mute. 7.20 Interrupt Mode Control (address 28h) 7.20.1 Interrupt Pin Control (INT1/INT0) Default = 00 00 - Active high, high output indicates interrupt condition has occurred 01 - Active low, low output indicates an interrupt condition has occurred 10 - Open drain, active low. Requires an external pull-up resistor on the INT pin. 11 - Reserved Function: Determines how the interrupt pin (INT) will indicate an interrupt condition. If any of the mask bits in the Interrupt Mask Register are set to a 1b, read the Interrupt Status Register to determine which condition caused the interrupt. CHXX_CORS[5:0] Coarse Filter Setting 000000 0 dB 000001 -0.1 dB 001010 -1.0 dB 011001 -2.5 dB 100000 -3.2 dB 101000 -4.0 dB Table 12. Channel Load Compensation Filter Coarse Adjust 765 43 21 0 RESERVED RESERVED CHXX_FINE5 CHXX_FINE4 CHXX_FINE3 CHXX_FINE2 CHXX_FINE1 CHXX_FINE0 CHXX_FINE[5:0] Fine Filter Setting 000000 0 dB 000001 -0.1 dB 001010 -1.0 dB 011001 -2.5 dB 100000 -3.2 dB 101000 -4.0 dB Table 13. Channel Load Compensation Filter Fine Adjust 765 43 21 0 INT1 INT0 RESERVED RESERVED RESERVED RESERVED RESERVED OVFL_L/E |
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