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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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TAS2120 bảng dữ liệu(PDF) 7 Page - Texas Instruments |
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TAS2120 bảng dữ liệu(HTML) 7 Page - Texas Instruments |
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7 / 63 page  5.5 Electrical Characteristics (continued) TA = 25 °C, VBAT = 3.6 V, VBAT2S = 7.2V (2S mode enabled), PVDD = 12 V ( External PVDD mode enabled), VDD = 1.8 V, IOVDD = 1.8V RL = 8Ω + 33µH, LBOOST = 1µH, fin = 1 kHz, fs = 48 kHz, Gain = 21dBV, BST_ILIM (1S battery) = 5.1A, BST_ILIM (2S battery, HW mode)=4.1A, BST_ILIM (2S battery, I2C mode)=5.1A, SDZ = 1, Noise gate disabled, Measured filter free with an Audio Precision using 22 Hz to 20 kHz un-weighted bandwidth (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ηSYSTEM_ 1W_2S System Efficiency at POUT = 1.0W RL = 8 Ω + 33 µH 89.9 % RL = 8 Ω + 33 µH, VBAT2S = 8.4V 89.5 % RL = 4 Ω + 33 µH 86.2 % RL = 4 Ω + 33 µH, VBAT2S = 8.4V 85.8 % ηSYSTEM_ 1W_2S System Efficiency at POUT = 1.0W RL = 8 Ω + 33 µH, HW pin control mode 89.9 % RL = 4 Ω + 33 µH, HW pin control mode 89.9 % ηSYSTEM_ MAX_POUT _2S System Efficiency at 1% THD+N power Level RL = 8 Ω + 33 µH 85 % RL = 8 Ω + 33 µH, VBAT2S= 8.4V 86.5 % RL = 4 Ω + 33 µH 77.4 % RL = 4 Ω + 33 µH, VBAT2S = 8.4V 78.0 % ηSYSTEM_ MAX_POUT _2S System Efficiency at 1% THD+N power Level RL = 8 Ω + 33 µH, HW pin control mode 85 % RL = 4 Ω + 33 µH, HW pin control mode 78.5 % VN_2S Idle channel Noise A-Weighted, Gain = 6dBV (Receiver Mode), DAC-Running 7.0 µV A-Weighted, Gain = 21dBV (Speaker Mode), DAC-Running 14.4 µV DNR_2S Dynamic Range A-Weighted, -60 dBFS Method, Gain = 6dBV (Receiver Mode) 108.9 dB A-Weighted, -60 dBFS Method, Gain = 21dBV (Speaker Mode) 114.4 dB THD+N_ 2S Total Harmonic distortion + Noise POUT = 1 W, RL = 8 Ω + 33 µH, fin = 1 kHz 0.003 % POUT = 1 W, RL = 4 Ω + 33 µH, fin = 1 kHz 0.003 % POUT = 0.25 W, RL = 8 Ω + 33 µH, fin = 1 kHz, Gain = 6dBV (Receiver Mode) 0.005 % KCP_2S Click and pop performance All dynamic power up/downs of audio channel except for faults. Includes In/Out of Mute, Power Up and power Down, Noise Gate mode entry and Exit. Measured at Peak A-weighted Voltage. RL = 8 Ω + 33 µH, Input = Digital silence. –68 dBV PSRRVB AT2S VBAT2S power-supply rejection ratio VBAT2S = 7.2 V + 200 mVpp, fripple = 217 Hz 115 dB VBAT2S = 7.2 V + 200 mVpp, fripple = 1 kHz 115 dB VBAT2S = 7.2 V + 200 mVpp, fripple = 20 kHz 90 dB PSRRVB AT_2S VBAT power-supply rejection ratio VBAT = 3.6 V + 200 mVpp, fripple = 217 Hz 115 dB VBAT = 3.6 V + 200 mVpp, fripple = 1 kHz 115 dB VBAT = 3.6 V + 200 mVpp, fripple = 20 kHz 90 dB PSRRVD D_2S VDD power-supply rejection ratio VDD = 1.8 V + 200 mVpp, fripple = 217 Hz 110 dB VDD = 1.8 V + 200 mVpp, fripple = 1 kHz 110 dB VDD = 1.8 V + 200 mVpp, fripple = 20 kHz 90 dB AMPLIFIER PERFORMANCE - EXTERNAL PVDD Mode POUT_EXT _PVDD Maximum Continuous Output Power - 1% THDN RL = 8 Ω + 33 µH 8.3 W RL = 4 Ω + 33 µH 14.9 W www.ti.com TAS2120 SLASFC6 – AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TAS2120 |
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