M24M02E-F datasheet(34/54 Pages) STMICROELECTRONICS

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Table 19. AC characteristics in Fast-mode

Symbol

Alt.

Parameter

Min.

Max.

Unit

fSCL

Clock frequency

400

kHz

tCHCL

tHIGH

Clock pulse width high

600

tCLCH

tLOW

Clock pulse width low

1300

tQL1QL2(1)

SDA (out) fall time

20(2)

300

tXH1XH2(1)

Input signal rise time

(3)

tXL1XL2(1)

Input signal fall time

(3)

tDXCH

tSU:DAT Data in setup time

100

tCLDX

tHD:DAT Data in hold time

tCLQX(4)

tDH

Data out hold time

100

tCLQV(5)

tAA

Clock low to next data valid (access time)

900

tCHDL

tSU:STA

Start condition setup time

600

tDLCL

tHD:STA Start condition hold time

600

tCHDH

tSU:STO Stop condition set up time

600

tDHDL

tBUF

Time between Stop condition and next Start condition

1300

tWLDL(1)(6)

tSU:WC

WC set up time (before the start condition)

μs

tDHWH(1)(7)

tHD:WC

WC hold time (after the stop condition)

μs

tWR

Write cycle time

4(8)

tNS(1)

Pulse width ignored (input filter on SCL and SDA) - single glitch

tWU(9)(10)

Wake up time

μs

1. Evaluated by characterization - Not tested in production.

2. With CL = 10 pF.

3. There is no min. or max. values for the input signal rise and fall times. It is however recommended by the I²C specification

that the input signal rise and fall times be more than 20 ns and less than 300 ns when fC < 400 kHz.

4. To avoid spurious start and stop conditions, a minimum delay is placed between SCL = 1 and the falling or rising edge of

SDA.

5. tCLQV is the time (from the falling edge of SCL) required by the SDA bus line to reach either 0.3VCC or 0.7VCC, assuming

that the Rbus × Cbus time constant is within the values specified in Figure 25.

6. WC = 0 setup time condition to enable the execution of a write command.

7. WC = 0 hold time condition to enable the execution of a write command.

8. 3.3 ms typical.

9. Specified by design - Not tested in production.

10. Wake up time: Delay between the VCC(min) stable and the first accepted command.

M24M02E-F

DC and AC parameters

DS14157 - Rev 2

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