PIC18F44J10-ESLASHSP datasheet(35/358 Pages) MICROCHIP

35 / 358 page

Preliminary

DS39682C-page 33

PIC18F45J10 FAMILY

3.2.3

RC_RUN MODE

In RC_RUN mode, the CPU and peripherals are

clocked from the internal oscillator; the primary clock is

shut down. This mode provides the best power conser-

vation of all the Run modes, while still executing code.

It works well for user applications which are not highly

timing-sensitive or do not require high-speed clocks at

all times.

This mode is entered by setting SCS to ‘11’. When the

clock source is switched to the INTRC (see Figure 3-2),

the primary oscillator is shut down and the OSTS bit is

cleared.

On transitions from RC_RUN mode to PRI_RUN mode,

the device continues to be clocked from the INTRC

while the primary clock is started. When the primary

clock becomes ready, a clock switch to the primary

clock occurs (see Figure 3-3). When the clock switch is

complete, the OSTS bit is set and the primary clock is

providing the device clock. The IDLEN and SCS bits

are not affected by the switch. The INTRC source will

continue to run if either the WDT or the Fail-Safe Clock

Monitor is enabled.

FIGURE 3-2:

TRANSITION TIMING TO RC_RUN MODE

FIGURE 3-3:

TRANSITION TIMING FROM RC_RUN MODE TO PRI_RUN MODE

OSC1

Peripheral

Program

INTRC

Counter

Clock

CPU

Clock

PC + 2

123

n-1

Clock Transition

PC + 4

Q3 Q4

OSC1

Peripheral

Program

INTRC

PC + 4

CPU Clock

PC + 2

Clock

Counter

Note 1: TOST = 1024 TOSC. These intervals are not shown to scale.

SCS1:SCS0 bits Changed

OSTS bit Set

TOST(1)

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