M68HC08 datasheet(61/288 Pages) FREESCALE

61 / 288 page

FLASH Memory

MC68HC908BD48 — Rev. 2.1

Data Sheet

Freescale Semiconductor

FLASH Memory

4.8 FLASH Block Protection

Due to the ability of the on-board charge pump to erase and program the

FLASH memory in the target application, provision is made for protecting

blocks of memory from unintentional erase or program operations due to

system malfunction. This protection is done by use of a FLASH Block

Protect Register (FLBPR). The FLBPR determines the range of the

FLASH memory which is to be protected. The range of the protected

area starts from a location defined by FLBPR and ends at the bottom of

the FLASH memory ($FFFF). When the memory is protected, the HVEN

bit cannot be set in either ERASE or PROGRAM operations.

4.9 FLASH Block Protect Register (FLBPR)

The FLASH block protect register is implemented as an 7-bit I/O register.

The BPR bit content of the register determines the starting location of the

protected range within the FLASH memory.

BPR[7:1] — FLASH Block Protect Bits

These seven bits represent bits [15:9] of a 16-bit memory address.

Bits [8:0] are logic 0s.

The resultant 16-bit address is used for specifying the start address

of the FLASH memory for block protection. The FLASH is protected

from this start address to the end of FLASH memory, at $FFFF.

Address:

$FE08

Bit 7

654321

Bit 0

Read:

BPR7

BPR6

BPR5

BPR4

BPR3

BPR2

BPR1

Write:

Reset:

00000000

= Unimplemented

Figure 4-3. FLASH Block Protect Register (FLBPR)

M68HC08 bảng dữ liệu(PDF) 61 Page - Freescale Semiconductor, Inc

M68HC08 bảng dữ liệu(HTML) 61 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL