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PLV1812MDDFREP bảng dữ liệu(PDF) 14 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  TLV1812-EP and TLV1822-EP Enhanced Product 40V Rail-to-Rail Input Comparators with Push-Pull and Open-Drain Outputs
PDF  33 Pages
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Trang chủ  http://www.ti.com
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6 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and
TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
6.1 Application Information
6.1.1 Basic Comparator Definitions
6.1.1.1 Operation
The basic comparator compares the input voltage (VIN) on one input to a reference voltage (VREF) on the other
input. In the Figure 6-1 example below, if VIN is less than VREF, the output voltage (VO) is logic low (VOL). If VIN
is greater than VREF, the output voltage (VO) is at logic high (VOH). Table 6-1 summarizes the output conditions.
The output logic can be inverted by simply swapping the input pins.
Table 6-1. Output Conditions
Inputs Condition
Output
IN+ > IN-
HIGH (VOH)
IN+ = IN-
Indeterminate (chatters - see Hysteresis)
IN+ < IN-
LOW (VOL)
6.1.1.2 Propagation Delay
There is a delay between from when the input crosses the reference voltage and the output responds. This
is called the Propagation Delay. Propagation delay can be different between high-to low and low-to-high input
transitions. This is shown as tpLH and tpHL in Figure 6-1 and is measured from the mid-point of the input to the
midpoint of the output.
Figure 6-1. Comparator Timing Diagram
TLV1812-EP, TLV1822-EP
SNOSDJ3 – MAY 2024
www.ti.com
14
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Product Folder Links: TLV1812-EP TLV1822-EP



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