LR4102 datasheet(5/32 Pages) LSI

5 / 32 page

TinyRISC LR4102 Microprocessor

Instruction Set Summary

Table 1 summarizes the 32-bit instruction set for the LR4102, and Table

2 lists the unimplemented MIPS II instructions. Table 3 provides a

summary of the LR4102 MIPS16 instruction set.

Table 1

LR4102 32-Bit Instruction Set Summary

Load and Store Instructions

Load Byte

Store Byte

LBU

Load Byte Unsigned

Store Halfword

Load Halfword

Store Word

LHU

Load Halfword Unsigned

SWL

Store Word Left

Load Word

SWR

Store Word Right

LWL

Load Word Left

SYNC

Synchronize (load/store

synchronization)

LWR

Load Word Right

–

Arithmetic Instructions: ALU Immediate

ADDI

Add Immediate

ORI

OR Immediate

ADDIU

Add Immediate Unsigned

SLTI

Set on Less Than Immediate

ANDI

AND Immediate

SLTIU

Set on Less Than Immediate

Unsigned

LUI

Load Upper Immediate

XORI

Exclusive OR Immediate

Arithmetic Instructions: Three-Operand, Register-Type

ADD

Add

SLT

Set on Less Than

ADDU

Add Unsigned

SLTU

Set on Less Than Unsigned

AND

Logical AND

SUB

Subtract

NOR

Logical NOR

SUBU

Subtract Unsigned

Logical OR

XOR

Logical Exclusive OR

(Sheet 1 of 4)

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